---

yaml
---
r: 267498
b: refs/heads/master
c: dcaf762
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: adf27befdc79a9403bfba82ee84f02a47bcd546c
+refs/heads/master: dcaf762fa4b8ea1ba7f0c0ebbc7c04a22a3ca0bd

trunk/drivers/staging/brcm80211/brcmsmac/aiutils.h

@@ -30,8 +30,6 @@
 #define SI_PCI_MEM_SZ		(64 * 1024 * 1024)
 /* Host Mode sb2pcitranslation1 (64 MB) */
 #define SI_PCI_CFG		0x0c000000
-/* Byteswapped Physical SDRAM */
-#define	SI_SDRAM_SWAPPED	0x10000000
 /* Region 2 for sdram (512 MB) */
 #define SI_SDRAM_R2		0x80000000
 

trunk/drivers/staging/brcm80211/brcmsmac/dma.c

@@ -442,9 +442,6 @@ struct dma_pub *dma_attach(char *name, struct si_pub *sih,
 	di->ddoffsethigh = SI_PCIE_DMA_H32;
 	di->dataoffsetlow = di->ddoffsetlow;
 	di->dataoffsethigh = di->ddoffsethigh;
-#if defined(__mips__) && defined(IL_BIGENDIAN)
-	di->dataoffsetlow = di->dataoffsetlow + SI_SDRAM_SWAPPED;
-#endif				/* defined(__mips__) && defined(IL_BIGENDIAN) */
 	/* WAR64450 : DMACtl.Addr ext fields are not supported in SDIOD core. */
 	if ((ai_coreid(sih) == SDIOD_CORE_ID)
 	    && ((ai_corerev(sih) > 0) && (ai_corerev(sih) <= 2)))
@@ -570,12 +567,7 @@ dma64_dd_upd(struct dma_info *di, struct dma64desc *ddring,
 	u32 ctrl2 = bufcount & D64_CTRL2_BC_MASK;
 
 	/* PCI bus with big(>1G) physical address, use address extension */
-#if defined(__mips__) && defined(IL_BIGENDIAN)
-	if ((di->dataoffsetlow == SI_SDRAM_SWAPPED)
-	    || !(pa & PCI32ADDR_HIGH)) {
-#else
 	if ((di->dataoffsetlow == 0) || !(pa & PCI32ADDR_HIGH)) {
-#endif				/* defined(__mips__) && defined(IL_BIGENDIAN) */
 		ddring[outidx].addrlow = cpu_to_le32(pa + di->dataoffsetlow);
 		ddring[outidx].addrhigh = cpu_to_le32(di->dataoffsethigh);
 		ddring[outidx].ctrl1 = cpu_to_le32(*flags);