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yaml --- r: 168275 b: refs/heads/master c: 58475fb h: refs/heads/master i: 168273: 1538bc4 168271: 5d65cde v: v3
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Jaswinder Singh Rajput
authored and
David Woodhouse
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Sep 24, 2009
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refs/heads/master: 1bbc9a66d0194449f32c2aa18be40db5744dbd85 | ||
refs/heads/master: 58475fb908485ab38860d6970a8063987fe1d619 |
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trunk/Documentation/ABI/testing/sysfs-devices-cache_disable
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What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X | ||
Date: August 2008 | ||
KernelVersion: 2.6.27 | ||
Contact: mark.langsdorf@amd.com | ||
Description: These files exist in every cpu's cache index directories. | ||
There are currently 2 cache_disable_# files in each | ||
directory. Reading from these files on a supported | ||
processor will return that cache disable index value | ||
for that processor and node. Writing to one of these | ||
files will cause the specificed cache index to be disabled. | ||
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Currently, only AMD Family 10h Processors support cache index | ||
disable, and only for their L3 caches. See the BIOS and | ||
Kernel Developer's Guide at | ||
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf | ||
for formatting information and other details on the | ||
cache index disable. | ||
Users: joachim.deguara@amd.com |
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trunk/Documentation/ABI/testing/sysfs-devices-system-cpu
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*/ | ||
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#include <stdio.h> | ||
#include <string.h> | ||
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#define EXAMPLES 6 | ||
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