---

yaml
---
r: 173820
b: refs/heads/master
c: 3f911a6
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4ef58d4e2ad1fa2a3e5bbf41af2284671fca8cf8
+refs/heads/master: 3f911a6e6b9c6b485a33a680c4ae29d86d2f2a54

trunk/.gitignore

@@ -25,7 +25,6 @@
 *.elf
 *.bin
 *.gz
-*.bz2
 *.lzma
 *.patch
 *.gcno

trunk/Documentation/ABI/testing/procfs-diskstats

@@ -8,7 +8,7 @@ Description:
 		 1 - major number
 		 2 - minor mumber
 		 3 - device name
-		 4 - reads completed successfully
+		 4 - reads completed succesfully
 		 5 - reads merged
 		 6 - sectors read
 		 7 - time spent reading (ms)

trunk/Documentation/ABI/testing/sysfs-block

@@ -4,7 +4,7 @@ Contact:	Jerome Marchand <jmarchan@redhat.com>
 Description:
 		The /sys/block/<disk>/stat files displays the I/O
 		statistics of disk <disk>. They contain 11 fields:
-		 1 - reads completed successfully
+		 1 - reads completed succesfully
 		 2 - reads merged
 		 3 - sectors read
 		 4 - time spent reading (ms)

trunk/Documentation/ABI/testing/sysfs-devices-cache_disable

@@ -0,0 +1,18 @@
+What:      /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
+Date:      August 2008
+KernelVersion:	2.6.27
+Contact:	mark.langsdorf@amd.com
+Description:	These files exist in every cpu's cache index directories.
+		There are currently 2 cache_disable_# files in each
+		directory.  Reading from these files on a supported
+		processor will return that cache disable index value
+		for that processor and node.  Writing to one of these
+		files will cause the specificed cache index to be disabled.
+
+		Currently, only AMD Family 10h Processors support cache index
+		disable, and only for their L3 caches.  See the BIOS and
+		Kernel Developer's Guide at
+		http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf
+		for formatting information and other details on the
+		cache index disable.
+Users:    joachim.deguara@amd.com

trunk/Documentation/DMA-mapping.txt

@@ -214,7 +214,7 @@ most specific mask.
 Here is pseudo-code showing how this might be done:
 
 	#define PLAYBACK_ADDRESS_BITS	DMA_BIT_MASK(32)
-	#define RECORD_ADDRESS_BITS	DMA_BIT_MASK(24)
+	#define RECORD_ADDRESS_BITS	0x00ffffff
 
 	struct my_sound_card *card;
 	struct pci_dev *pdev;
@@ -224,14 +224,14 @@ Here is pseudo-code showing how this might be done:
 		card->playback_enabled = 1;
 	} else {
 		card->playback_enabled = 0;
-		printk(KERN_WARNING "%s: Playback disabled due to DMA limitations.\n",
+		printk(KERN_WARN "%s: Playback disabled due to DMA limitations.\n",
 		       card->name);
 	}
 	if (!pci_set_dma_mask(pdev, RECORD_ADDRESS_BITS)) {
 		card->record_enabled = 1;
 	} else {
 		card->record_enabled = 0;
-		printk(KERN_WARNING "%s: Record disabled due to DMA limitations.\n",
+		printk(KERN_WARN "%s: Record disabled due to DMA limitations.\n",
 		       card->name);
 	}
 

trunk/Documentation/DocBook/genericirq.tmpl

@@ -417,8 +417,8 @@ desc->chip->end();
       </para>
       <para>
 	To make use of the split implementation, replace the call to
-	__do_IRQ by a call to desc->handle_irq() and associate
-        the appropriate handler function to desc->handle_irq().
+	__do_IRQ by a call to desc->chip->handle_irq() and associate
+        the appropriate handler function to desc->chip->handle_irq().
 	In most cases the generic handler implementations should
 	be sufficient.
      </para>

trunk/Documentation/DocBook/kernel-hacking.tmpl

@@ -352,7 +352,7 @@ asmlinkage long sys_mycall(int arg)
   </para>
 
   <programlisting>
-if (signal_pending(current))
+if (signal_pending()) 
         return -ERESTARTSYS;
   </programlisting>
 

trunk/Documentation/DocBook/mtdnand.tmpl

@@ -362,7 +362,7 @@ module_exit(board_cleanup);
 	<sect1 id="Multiple_chip_control">
 		<title>Multiple chip control</title>
 		<para>
-			The nand driver can control chip arrays. Therefore the
+			The nand driver can control chip arrays. Therefor the
 			board driver must provide an own select_chip function. This
 			function must (de)select the requested chip.
 			The function pointer in the nand_chip structure must

trunk/Documentation/DocBook/tracepoint.tmpl

@@ -86,9 +86,4 @@
 !Iinclude/trace/events/irq.h
   </chapter>
 
-  <chapter id="signal">
-   <title>SIGNAL</title>
-!Iinclude/trace/events/signal.h
-  </chapter>
-
 </book>

trunk/Documentation/DocBook/v4l/videodev2.h.xml

@@ -492,7 +492,7 @@ struct <link linkend="v4l2-jpegcompression">v4l2_jpegcompression</link> {
                                  * you do, leave them untouched.
                                  * Inluding less markers will make the
                                  * resulting code smaller, but there will
-                                 * be fewer applications which can read it.
+                                 * be fewer aplications which can read it.
                                  * The presence of the APP and COM marker
                                  * is influenced by APP_len and COM_len
                                  * ONLY, not by this property! */

trunk/Documentation/DocBook/writing-an-alsa-driver.tmpl

@@ -5318,7 +5318,7 @@ struct _snd_pcm_runtime {
       pages of the given size and map them onto the virtually contiguous
       memory.  The virtual pointer is addressed in runtime->dma_area.
       The physical address (runtime->dma_addr) is set to zero,
-      because the buffer is physically non-contiguous.
+      because the buffer is physically non-contigous.
       The physical address table is set up in sgbuf->table.
       You can get the physical address at a certain offset via
       <function>snd_pcm_sgbuf_get_addr()</function>.