---

yaml
---
r: 137485
b: refs/heads/master
c: 7954763
h: refs/heads/master
i:
  137483: 48f44a5
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 3a853fb933ddf9c5ea8c9f7c665dd8def26bceae
+refs/heads/master: 7954763bb95fd484a76d1151b40956fe331d23b9

trunk/Documentation/kernel-parameters.txt

@@ -831,6 +831,8 @@ and is between 256 and 4096 characters. It is defined in the file
 			       terminal devices. Valid values: 0..8
 
 	i2c_bus=	[HW] Override the default board specific I2C bus speed
+			     or register an additional I2C bus that is not
+			     registered from board initialization code.
 			     Format:
 			     <bus_id>,<clkrate>
 

trunk/arch/arm/plat-omap/i2c.c

@@ -98,6 +98,8 @@ static const int omap34xx_pins[][2] = {
 static const int omap34xx_pins[][2] = {};
 #endif
 
+#define OMAP_I2C_CMDLINE_SETUP	(BIT(31))
+
 static void __init omap_i2c_mux_pins(int bus)
 {
 	int scl, sda;
@@ -133,6 +135,31 @@ static int __init omap_i2c_nr_ports(void)
 	return ports;
 }
 
+static int __init omap_i2c_add_bus(int bus_id)
+{
+	struct platform_device *pdev;
+	struct resource *res;
+	resource_size_t base, irq;
+
+	pdev = &omap_i2c_devices[bus_id - 1];
+	if (bus_id == 1) {
+		res = pdev->resource;
+		if (cpu_class_is_omap1()) {
+			base = OMAP1_I2C_BASE;
+			irq = INT_I2C;
+		} else {
+			base = OMAP2_I2C_BASE1;
+			irq = INT_24XX_I2C1_IRQ;
+		}
+		res[0].start = base;
+		res[0].end = base + OMAP_I2C_SIZE;
+		res[1].start = irq;
+	}
+
+	omap_i2c_mux_pins(bus_id - 1);
+	return platform_device_register(pdev);
+}
+
 /**
  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
  * @str: String of options
@@ -154,11 +181,33 @@ static int __init omap_i2c_bus_setup(char *str)
 	if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
 		return 0;
 	i2c_rate[ints[1] - 1] = ints[2];
+	i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
 
 	return 1;
 }
 __setup("i2c_bus=", omap_i2c_bus_setup);
 
+/*
+ * Register busses defined in command line but that are not registered with
+ * omap_register_i2c_bus from board initialization code.
+ */
+static int __init omap_register_i2c_bus_cmdline(void)
+{
+	int i, err = 0;
+
+	for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
+		if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
+			i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
+			err = omap_i2c_add_bus(i + 1);
+			if (err)
+				goto out;
+		}
+
+out:
+	return err;
+}
+subsys_initcall(omap_register_i2c_bus_cmdline);
+
 /**
  * omap_register_i2c_bus - register I2C bus with device descriptors
  * @bus_id: bus id counting from number 1
@@ -173,9 +222,6 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 			  unsigned len)
 {
 	int err;
-	struct platform_device *pdev;
-	struct resource *res;
-	resource_size_t base, irq;
 
 	BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
 
@@ -185,24 +231,9 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
 			return err;
 	}
 
-	pdev = &omap_i2c_devices[bus_id - 1];
-	if (i2c_rate[bus_id - 1] == 0)
+	if (!i2c_rate[bus_id - 1])
 		i2c_rate[bus_id - 1] = clkrate;
+	i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
 
-	if (bus_id == 1) {
-		res = pdev->resource;
-		if (cpu_class_is_omap1()) {
-			base = OMAP1_I2C_BASE;
-			irq = INT_I2C;
-		} else {
-			base = OMAP2_I2C_BASE1;
-			irq = INT_24XX_I2C1_IRQ;
-		}
-		res[0].start = base;
-		res[0].end = base + OMAP_I2C_SIZE;
-		res[1].start = irq;
-	}
-
-	omap_i2c_mux_pins(bus_id - 1);
-	return platform_device_register(pdev);
+	return omap_i2c_add_bus(bus_id);
 }