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yaml
---
r: 80543
b: refs/heads/master
c: 3b233e5
h: refs/heads/master
i:
  80541: 4dafbd0
  80539: afd0431
  80535: bf66862
  80527: 6d71f35
  80511: aa8bd81
v: v3
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Thomas Gleixner authored and Ingo Molnar committed Jan 30, 2008
1 parent 173e394 commit e84d421
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Showing 2 changed files with 9 additions and 15 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: cd8ddf1a2800026dd58433333cce7a65cbc6c6d2
refs/heads/master: 3b233e52f70bf102078b2c0c3f7f86a441689056
22 changes: 8 additions & 14 deletions trunk/arch/x86/mm/pageattr.c
Original file line number Diff line number Diff line change
Expand Up @@ -64,35 +64,29 @@ static void cpa_flush_all(void)
on_each_cpu(__cpa_flush_all, NULL, 1, 1);
}

struct clflush_data {
unsigned long addr;
int numpages;
};

static void __cpa_flush_range(void *arg)
{
struct clflush_data *cld = arg;

/*
* We could optimize that further and do individual per page
* tlb invalidates for a low number of pages. Caveat: we must
* flush the high aliases on 64bit as well.
*/
__flush_tlb_all();

clflush_cache_range((void *) cld->addr, cld->numpages * PAGE_SIZE);
}

static void cpa_flush_range(unsigned long addr, int numpages)
{
struct clflush_data cld;

BUG_ON(irqs_disabled());

cld.addr = addr;
cld.numpages = numpages;
on_each_cpu(__cpa_flush_range, NULL, 1, 1);

on_each_cpu(__cpa_flush_range, &cld, 1, 1);
/*
* We only need to flush on one CPU,
* clflush is a MESI-coherent instruction that
* will cause all other CPUs to flush the same
* cachelines:
*/
clflush_cache_range((void *) addr, numpages * PAGE_SIZE);
}

/*
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