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Merge tag 'renesas-pinmux2-for-v3.10' into boards-base
Second round of Renesas ARM and SH based SoC pinmux updates for v3.10 Highlights: * Compilation fixes for sh7269 and for when CONFIG_BUG is not set * sh-pfc Support for r8a73a4 SoC * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 This merge is made to supply run-time dependencies for the following patches that will bea added on top: ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,94 @@ | ||
| /* | ||
| * Device Tree Source for the r8a73a4 SoC | ||
| * | ||
| * Copyright (C) 2013 Renesas Solutions Corp. | ||
| * Copyright (C) 2013 Magnus Damm | ||
| * | ||
| * This file is licensed under the terms of the GNU General Public License | ||
| * version 2. This program is licensed "as is" without any warranty of any | ||
| * kind, whether express or implied. | ||
| */ | ||
|
|
||
| / { | ||
| compatible = "renesas,r8a73a4"; | ||
| interrupt-parent = <&gic>; | ||
| #address-cells = <2>; | ||
| #size-cells = <2>; | ||
|
|
||
| cpus { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
|
||
| cpu0: cpu@0 { | ||
| device_type = "cpu"; | ||
| compatible = "arm,cortex-a15"; | ||
| reg = <0>; | ||
| clock-frequency = <1500000000>; | ||
| }; | ||
| }; | ||
|
|
||
| gic: interrupt-controller@f1001000 { | ||
| compatible = "arm,cortex-a15-gic"; | ||
| #interrupt-cells = <3>; | ||
| #address-cells = <0>; | ||
| interrupt-controller; | ||
| reg = <0 0xf1001000 0 0x1000>, | ||
| <0 0xf1002000 0 0x1000>, | ||
| <0 0xf1004000 0 0x2000>, | ||
| <0 0xf1006000 0 0x2000>; | ||
| interrupts = <1 9 0xf04>; | ||
|
|
||
| gic-cpuif@4 { | ||
| compatible = "arm,gic-cpuif"; | ||
| cpuif-id = <4>; | ||
| cpu = <&cpu0>; | ||
| }; | ||
| }; | ||
|
|
||
| timer { | ||
| compatible = "arm,armv7-timer"; | ||
| interrupts = <1 13 0xf08>, | ||
| <1 14 0xf08>, | ||
| <1 11 0xf08>, | ||
| <1 10 0xf08>; | ||
| }; | ||
|
|
||
| irqc0: interrupt-controller@e61c0000 { | ||
| compatible = "renesas,irqc"; | ||
| #interrupt-cells = <2>; | ||
| interrupt-controller; | ||
| reg = <0 0xe61c0000 0 0x200>; | ||
| interrupt-parent = <&gic>; | ||
| interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>, | ||
| <0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>, | ||
| <0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>, | ||
| <0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>, | ||
| <0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>, | ||
| <0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>, | ||
| <0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>, | ||
| <0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>; | ||
| }; | ||
|
|
||
| irqc1: interrupt-controller@e61c0200 { | ||
| compatible = "renesas,irqc"; | ||
| #interrupt-cells = <2>; | ||
| interrupt-controller; | ||
| reg = <0 0xe61c0200 0 0x200>; | ||
| interrupt-parent = <&gic>; | ||
| interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>, | ||
| <0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>, | ||
| <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>, | ||
| <0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>, | ||
| <0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>, | ||
| <0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>, | ||
| <0 56 4>, <0 57 4>; | ||
| }; | ||
|
|
||
| thermal@e61f0000 { | ||
| compatible = "renesas,rcar-thermal"; | ||
| reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, | ||
| <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>; | ||
| interrupt-parent = <&gic>; | ||
| interrupts = <0 69 4>; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,35 @@ | ||
| /* | ||
| * Device Tree Source for Renesas r8a7778 | ||
| * | ||
| * Copyright (C) 2013 Renesas Solutions Corp. | ||
| * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | ||
| * | ||
| * based on r8a7779 | ||
| * | ||
| * Copyright (C) 2013 Renesas Solutions Corp. | ||
| * Copyright (C) 2013 Simon Horman | ||
| * | ||
| * This file is licensed under the terms of the GNU General Public License | ||
| * version 2. This program is licensed "as is" without any warranty of any | ||
| * kind, whether express or implied. | ||
| */ | ||
|
|
||
| /include/ "skeleton.dtsi" | ||
|
|
||
| / { | ||
| compatible = "renesas,r8a7778"; | ||
|
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||
| cpus { | ||
| cpu@0 { | ||
| compatible = "arm,cortex-a9"; | ||
| }; | ||
| }; | ||
|
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||
| gic: interrupt-controller@fe438000 { | ||
| compatible = "arm,cortex-a9-gic"; | ||
| #interrupt-cells = <3>; | ||
| interrupt-controller; | ||
| reg = <0xfe438000 0x1000>, | ||
| <0xfe430000 0x100>; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,63 @@ | ||
| /* | ||
| * Device Tree Source for the r8a7790 SoC | ||
| * | ||
| * Copyright (C) 2013 Renesas Solutions Corp. | ||
| * | ||
| * This file is licensed under the terms of the GNU General Public License | ||
| * version 2. This program is licensed "as is" without any warranty of any | ||
| * kind, whether express or implied. | ||
| */ | ||
|
|
||
| / { | ||
| compatible = "renesas,r8a7790"; | ||
| interrupt-parent = <&gic>; | ||
| #address-cells = <2>; | ||
| #size-cells = <2>; | ||
|
|
||
| cpus { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
|
|
||
| cpu0: cpu@0 { | ||
| device_type = "cpu"; | ||
| compatible = "arm,cortex-a15"; | ||
| reg = <0>; | ||
| clock-frequency = <1300000000>; | ||
| }; | ||
| }; | ||
|
|
||
| gic: interrupt-controller@f1001000 { | ||
| compatible = "arm,cortex-a15-gic"; | ||
| #interrupt-cells = <3>; | ||
| #address-cells = <0>; | ||
| interrupt-controller; | ||
| reg = <0 0xf1001000 0 0x1000>, | ||
| <0 0xf1002000 0 0x1000>, | ||
| <0 0xf1004000 0 0x2000>, | ||
| <0 0xf1006000 0 0x2000>; | ||
| interrupts = <1 9 0xf04>; | ||
|
|
||
| gic-cpuif@4 { | ||
| compatible = "arm,gic-cpuif"; | ||
| cpuif-id = <4>; | ||
| cpu = <&cpu0>; | ||
| }; | ||
| }; | ||
|
|
||
| timer { | ||
| compatible = "arm,armv7-timer"; | ||
| interrupts = <1 13 0xf08>, | ||
| <1 14 0xf08>, | ||
| <1 11 0xf08>, | ||
| <1 10 0xf08>; | ||
| }; | ||
|
|
||
| irqc0: interrupt-controller@e61c0000 { | ||
| compatible = "renesas,irqc"; | ||
| #interrupt-cells = <2>; | ||
| interrupt-controller; | ||
| reg = <0 0xe61c0000 0 0x200>; | ||
| interrupt-parent = <&gic>; | ||
| interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>; | ||
| }; | ||
| }; |
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