Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history 
yaml
---
r: 11451
b: refs/heads/master
c: b8f114d
h: refs/heads/master
i:
  11449: 0c12941
  11447: cfadb25
v: v3
  • Loading branch information
Jon Loeliger authored and Paul Mackerras committed Sep 22, 2005
1 parent dc4a509 commit ebc521e
Show file tree
Hide file tree
Showing 4 changed files with 58 additions and 367 deletions.
2 changes: 1 addition & 1 deletion [refs]
View file
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: e903c5b536895fdf69970df62c5bf49ad17e6533
refs/heads/master: b8f114db84dac709080198e08a5564976afd6579
3 changes: 2 additions & 1 deletion trunk/arch/ppc/kernel/setup.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -71,7 +71,8 @@ struct ide_machdep_calls ppc_ide_md;
unsigned long boot_mem_size;

unsigned long ISA_DMA_THRESHOLD;
unsigned long DMA_MODE_READ, DMA_MODE_WRITE;
unsigned int DMA_MODE_READ;
unsigned int DMA_MODE_WRITE;

#ifdef CONFIG_PPC_MULTIPLATFORM
int _machine = 0;
Expand Down
91 changes: 55 additions & 36 deletions trunk/include/asm-ppc/dma.h → trunk/include/asm-powerpc/dma.h
View file
Original file line number Diff line number Diff line change
@@ -1,18 +1,14 @@
#ifndef _ASM_POWERPC_DMA_H
#define _ASM_POWERPC_DMA_H

/*
* include/asm-ppc/dma.h: Defines for using and allocating dma channels.
* Defines for using and allocating dma channels.
* Written by Hennus Bergman, 1992.
* High DMA channel support & info by Hannu Savolainen
* and John Boyd, Nov. 1992.
* Changes for ppc sound by Christoph Nadig
*/

#ifdef __KERNEL__

#include <linux/config.h>
#include <asm/io.h>
#include <linux/spinlock.h>
#include <asm/system.h>

/*
* Note: Adapted for PowerPC by Gary Thomas
* Modified by Cort Dougan <cort@cs.nmt.edu>
Expand All @@ -25,20 +21,20 @@
* with a grain of salt.
*/

#ifndef _ASM_DMA_H
#define _ASM_DMA_H
#include <linux/config.h>
#include <asm/io.h>
#include <linux/spinlock.h>
#include <asm/system.h>

#ifndef MAX_DMA_CHANNELS
#define MAX_DMA_CHANNELS 8
#endif

/* The maximum address that we can perform a DMA transfer to on this platform */
/* Doesn't really apply... */
#define MAX_DMA_ADDRESS 0xFFFFFFFF
#define MAX_DMA_ADDRESS (~0UL)

/* in arch/ppc/kernel/setup.c -- Cort */
extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
extern unsigned long ISA_DMA_THRESHOLD;
#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)

#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
#define dma_outb outb_p
Expand Down Expand Up @@ -171,7 +167,18 @@ extern long ppc_cs4232_dma, ppc_cs4232_dma2;
#define DMA1_EXT_REG 0x40B
#define DMA2_EXT_REG 0x4D6

#ifndef __powerpc64__
/* in arch/ppc/kernel/setup.c -- Cort */
extern unsigned int DMA_MODE_WRITE;
extern unsigned int DMA_MODE_READ;
extern unsigned long ISA_DMA_THRESHOLD;
#else
#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
#endif

#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */

#define DMA_AUTOINIT 0x10

extern spinlock_t dma_spin_lock;
Expand Down Expand Up @@ -200,8 +207,9 @@ static __inline__ void enable_dma(unsigned int dmanr)
if (dmanr <= 3) {
dma_outb(dmanr, DMA1_MASK_REG);
dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */
} else
} else {
dma_outb(dmanr & 3, DMA2_MASK_REG);
}
}

static __inline__ void disable_dma(unsigned int dmanr)
Expand Down Expand Up @@ -290,19 +298,26 @@ static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
{
if (dmanr <= 3) {
dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
dma_outb(phys & 0xff,
((dmanr & 3) << 1) + IO_DMA1_BASE);
dma_outb((phys >> 8) & 0xff,
((dmanr & 3) << 1) + IO_DMA1_BASE);
} else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb(phys & 0xff,
((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((phys >> 8) & 0xff,
((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((dmanr & 3), DMA2_EXT_REG);
} else {
dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((phys >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((phys >> 1) & 0xff,
((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((phys >> 9) & 0xff,
((dmanr & 3) << 2) + IO_DMA2_BASE);
}
set_dma_page(dmanr, phys >> 16);
}


/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
* a specific DMA channel.
* You must ensure the parameters are valid.
Expand All @@ -315,21 +330,24 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
{
count--;
if (dmanr <= 3) {
dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 +
IO_DMA1_BASE);
dma_outb(count & 0xff,
((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
dma_outb((count >> 8) & 0xff,
((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
} else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
dma_outb(count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 +
IO_DMA2_BASE);
dma_outb(count & 0xff,
((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
dma_outb((count >> 8) & 0xff,
((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
} else {
dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 +
IO_DMA2_BASE);
dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 +
IO_DMA2_BASE);
dma_outb((count >> 1) & 0xff,
((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
dma_outb((count >> 9) & 0xff,
((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
}
}


/* Get DMA residue count. After a DMA transfer, this
* should return zero. Reading this while a DMA transfer is
* still in progress will return unpredictable results.
Expand All @@ -340,8 +358,8 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
*/
static __inline__ int get_dma_residue(unsigned int dmanr)
{
unsigned int io_port = (dmanr <= 3) ?
((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
unsigned int io_port = (dmanr <= 3)
? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
: ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;

/* using short to get 16-bit wrap around */
Expand All @@ -352,7 +370,6 @@ static __inline__ int get_dma_residue(unsigned int dmanr)

return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2)
? count : (count << 1);

}

/* These are in kernel/dma.c: */
Expand All @@ -367,5 +384,7 @@ extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy (0)
#endif
#endif /* _ASM_DMA_H */
#endif /* __KERNEL__ */

#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */

#endif /* _ASM_POWERPC_DMA_H */
Loading

0 comments on commit ebc521e

Please sign in to comment.