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staging: comedi: addi_apci_16xx: simplify PCI bar reading
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The boards supported by this driver do not have an eeprom. Knowing
this information allows simplifying the code that reads the PCI
bars to get the iobase addresses.

The only 'iobase' actually used by this driver is found in PCI
bar 0. Don't bother reading the other PCI bars.

Also, since 'dw_AiBase' is not ioremap'ed we can remove the check
and iounmap in the detach.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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H Hartley Sweeten authored and Greg Kroah-Hartman committed Jan 18, 2013
1 parent 046e0d1 commit ebea8c6
Showing 1 changed file with 2 additions and 28 deletions.
30 changes: 2 additions & 28 deletions drivers/staging/comedi/drivers/addi_apci_16xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -14,8 +14,6 @@ static const struct addi_board apci16xx_boardtypes[] = {
.pc_DriverName = "apci1648",
.i_VendorId = PCI_VENDOR_ID_ADDIDATA,
.i_DeviceId = 0x1009,
.i_IorangeBase0 = 128,
.i_PCIEeprom = ADDIDATA_NO_EEPROM,
.i_NbrTTLChannel = 48,
.ttl_config = i_APCI16XX_InsnConfigInitTTLIO,
.ttl_bits = i_APCI16XX_InsnBitsReadTTLIO,
Expand All @@ -25,8 +23,6 @@ static const struct addi_board apci16xx_boardtypes[] = {
.pc_DriverName = "apci1696",
.i_VendorId = PCI_VENDOR_ID_ADDIDATA,
.i_DeviceId = 0x100A,
.i_IorangeBase0 = 128,
.i_PCIEeprom = ADDIDATA_NO_EEPROM,
.i_NbrTTLChannel = 96,
.ttl_config = i_APCI16XX_InsnConfigInitTTLIO,
.ttl_bits = i_APCI16XX_InsnBitsReadTTLIO,
Expand Down Expand Up @@ -76,25 +72,8 @@ static int apci16xx_auto_attach(struct comedi_device *dev,
if (ret)
return ret;

if (!this_board->pc_EepromChip ||
strcmp(this_board->pc_EepromChip, ADDIDATA_9054)) {
/* board does not have an eeprom or is not ADDIDATA_9054 */
if (this_board->i_IorangeBase1)
dev->iobase = pci_resource_start(pcidev, 1);
else
dev->iobase = pci_resource_start(pcidev, 0);

devpriv->iobase = dev->iobase;
devpriv->i_IobaseAmcc = pci_resource_start(pcidev, 0);
devpriv->i_IobaseAddon = pci_resource_start(pcidev, 2);
} else {
/* board has an ADDIDATA_9054 eeprom */
dev->iobase = pci_resource_start(pcidev, 2);
devpriv->iobase = pci_resource_start(pcidev, 2);
devpriv->dw_AiBase = ioremap(pci_resource_start(pcidev, 3),
this_board->i_IorangeBase3);
}
devpriv->i_IobaseReserved = pci_resource_start(pcidev, 3);
dev->iobase = pci_resource_start(pcidev, 0);
devpriv->iobase = dev->iobase;

/* Initialize parameters that can be overridden in EEPROM */
devpriv->s_EeParameters.i_NbrAiChannel = this_board->i_NbrAiChannel;
Expand Down Expand Up @@ -165,12 +144,7 @@ static int apci16xx_auto_attach(struct comedi_device *dev,
static void apci16xx_detach(struct comedi_device *dev)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct addi_private *devpriv = dev->private;

if (devpriv) {
if (devpriv->dw_AiBase)
iounmap(devpriv->dw_AiBase);
}
if (pcidev) {
if (dev->iobase)
comedi_pci_disable(pcidev);
Expand Down

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