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powerpc: Repair device bindings documentation
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Commit d0fc2ea "powerpc/fsl: Refactor
device bindings" split out a number of device bindings from
booting-without-of.txt into separate files.  Having them all in one file
was a frequent source of merge conflicts.

However, in the next merge, 49997d7, there
was another conflict.  Some of the bindings removed from
booting-without-of.txt were mistakenly added back in and the copies in
dts-bindings were kept as well.

This patch re-removes "Freescale Display Interface" and "Freescale on board
FPGA" and fixes the table of contents.

Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Trent Piepho authored and Kumar Gala committed Nov 10, 2008
1 parent ea37194 commit ec5d765
Showing 1 changed file with 10 additions and 55 deletions.
65 changes: 10 additions & 55 deletions Documentation/powerpc/booting-without-of.txt
Original file line number Diff line number Diff line change
Expand Up @@ -41,25 +41,14 @@ Table of Contents
VI - System-on-a-chip devices and nodes
1) Defining child nodes of an SOC
2) Representing devices without a current OF specification
a) MDIO IO device
b) Gianfar-compatible ethernet nodes
c) PHY nodes
d) Interrupt controllers
e) I2C
f) Freescale SOC USB controllers
g) Freescale SOC SEC Security Engines
h) Board Control and Status (BCSR)
i) Freescale QUICC Engine module (QE)
j) CFI or JEDEC memory-mapped NOR flash
k) Global Utilities Block
l) Freescale Communications Processor Module
m) Chipselect/Local Bus
n) 4xx/Axon EMAC ethernet nodes
o) Xilinx IP cores
p) Freescale Synchronous Serial Interface
q) USB EHCI controllers
r) MDIO on GPIOs
s) SPI busses
a) PHY nodes
b) Interrupt controllers
c) CFI or JEDEC memory-mapped NOR flash
d) 4xx/Axon EMAC ethernet nodes
e) Xilinx IP cores
f) USB EHCI controllers
g) MDIO on GPIOs
h) SPI busses

VII - Marvell Discovery mv64[345]6x System Controller chips
1) The /system-controller node
Expand Down Expand Up @@ -1830,41 +1819,7 @@ platforms are moved over to use the flattened-device-tree model.
big-endian;
};

r) Freescale Display Interface Unit

The Freescale DIU is a LCD controller, with proper hardware, it can also
drive DVI monitors.

Required properties:
- compatible : should be "fsl-diu".
- reg : should contain at least address and length of the DIU register
set.
- Interrupts : one DIU interrupt should be describe here.

Example (MPC8610HPCD)
display@2c000 {
compatible = "fsl,diu";
reg = <0x2c000 100>;
interrupts = <72 2>;
interrupt-parent = <&mpic>;
};

s) Freescale on board FPGA

This is the memory-mapped registers for on board FPGA.

Required properities:
- compatible : should be "fsl,fpga-pixis".
- reg : should contain the address and the lenght of the FPPGA register
set.

Example (MPC8610HPCD)
board-control@e8000000 {
compatible = "fsl,fpga-pixis";
reg = <0xe8000000 32>;
};

r) MDIO on GPIOs
g) MDIO on GPIOs

Currently defined compatibles:
- virtual,gpio-mdio
Expand All @@ -1884,7 +1839,7 @@ platforms are moved over to use the flattened-device-tree model.
&qe_pio_c 6>;
};

s) SPI (Serial Peripheral Interface) busses
h) SPI (Serial Peripheral Interface) busses

SPI busses can be described with a node for the SPI master device
and a set of child nodes for each SPI slave on the bus. For this
Expand Down

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