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Merge tag 'imx-dt-3.11' of git://git.linaro.org/people/shawnguo/linux…
…-2.6 into next/dt
From Shawn Guo:
imx device tree changes for 3.11:
* A bunch of new board additions, imx6sl-evk, vf610-twr, imx53-tx53,
imx53-m53evk and imx27-phytec-phycore
* Various pinctrl setting updates and additions
* Enable various on board peripherals, usb, audio, nor, display etc.
* Configure L2 cache data and tag latency from device tree
* Add imx-weim bus driver
* tag 'imx-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: (82 commits)
ARM: dts: imx27: Add VPU devicetree node
ARM: mxc: fix gpio-ranges for VF610
ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962
ARM: dtsi: imx6dl: Add a pinctrl for AUDMUX
ARM: dtsi: imx6q/imx6dl: Add a pinctrl for I2C1
ARM: dts: imx6qdl-sabresd: add clko1 iomux configuration
ARM: dts: Phytec imx6q pfla02 and pbab01 support
ARM: dts: imx6q: Add pinctrl for usdhc2 and enet
ARM: dts: imx27-phytec-phycore-rdk: Add MTD name for NOR flash
ARM: dts: imx27-phytec-phycore-rdk: Add SDHC support
ARM: dts: i.MX27: Add SDHC devicetree nodes
ARM: dts: i.MX27: Add DMA devicetree node
ARM: dts: imx6qdl-sabreauto: enable the WEIM NOR
ARM: dts: imx6dl: add pinctrls for WEIM NOR
ARM: dts: imx6q: add pinctrls for WEIM NOR
ARM: dts: imx6qdl: add more information for WEIM
ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>- Loading branch information
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| Device tree bindings for i.MX Wireless External Interface Module (WEIM) | ||
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| The term "wireless" does not imply that the WEIM is literally an interface | ||
| without wires. It simply means that this module was originally designed for | ||
| wireless and mobile applications that use low-power technology. | ||
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| The actual devices are instantiated from the child nodes of a WEIM node. | ||
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| Required properties: | ||
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| - compatible: Should be set to "fsl,imx6q-weim" | ||
| - reg: A resource specifier for the register space | ||
| (see the example below) | ||
| - clocks: the clock, see the example below. | ||
| - #address-cells: Must be set to 2 to allow memory address translation | ||
| - #size-cells: Must be set to 1 to allow CS address passing | ||
| - ranges: Must be set up to reflect the memory layout with four | ||
| integer values for each chip-select line in use: | ||
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| <cs-number> 0 <physical address of mapping> <size> | ||
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| Timing property for child nodes. It is mandatory, not optional. | ||
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| - fsl,weim-cs-timing: The timing array, contains 6 timing values for the | ||
| child node. We can get the CS index from the child | ||
| node's "reg" property. This property contains the values | ||
| for the registers EIM_CSnGCR1, EIM_CSnGCR2, EIM_CSnRCR1, | ||
| EIM_CSnRCR2, EIM_CSnWCR1, EIM_CSnWCR2 in this order. | ||
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| Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: | ||
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| weim: weim@021b8000 { | ||
| compatible = "fsl,imx6q-weim"; | ||
| reg = <0x021b8000 0x4000>; | ||
| clocks = <&clks 196>; | ||
| #address-cells = <2>; | ||
| #size-cells = <1>; | ||
| ranges = <0 0 0x08000000 0x08000000>; | ||
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| nor@0,0 { | ||
| compatible = "cfi-flash"; | ||
| reg = <0 0 0x02000000>; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| bank-width = <2>; | ||
| fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 | ||
| 0x0000c000 0x1404a38e 0x00000000>; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,37 @@ | ||
| /* | ||
| * The code contained herein is licensed under the GNU General Public | ||
| * License. You may obtain a copy of the GNU General Public License | ||
| * Version 2 or later at the following locations: | ||
| * | ||
| * http://www.opensource.org/licenses/gpl-license.html | ||
| * http://www.gnu.org/copyleft/gpl.html | ||
| */ | ||
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| #include "imx27-phytec-phycore-som.dts" | ||
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| / { | ||
| model = "Phytec pcm970"; | ||
| compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27"; | ||
| }; | ||
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| &cspi1 { | ||
| fsl,spi-num-chipselects = <2>; | ||
| cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>; | ||
| }; | ||
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| &sdhci2 { | ||
| bus-width = <4>; | ||
| cd-gpios = <&gpio3 29 0>; | ||
| wp-gpios = <&gpio3 28 0>; | ||
| vmmc-supply = <&vmmc1_reg>; | ||
| status = "okay"; | ||
| }; | ||
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| &uart1 { | ||
| fsl,uart-has-rtscts; | ||
| }; | ||
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| &uart2 { | ||
| fsl,uart-has-rtscts; | ||
| status = "okay"; | ||
| }; |
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| /* | ||
| * Copyright 2012 Sascha Hauer, Pengutronix | ||
| * | ||
| * The code contained herein is licensed under the GNU General Public | ||
| * License. You may obtain a copy of the GNU General Public License | ||
| * Version 2 or later at the following locations: | ||
| * | ||
| * http://www.opensource.org/licenses/gpl-license.html | ||
| * http://www.gnu.org/copyleft/gpl.html | ||
| */ | ||
|
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| /dts-v1/; | ||
| #include "imx27.dtsi" | ||
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| / { | ||
| model = "Phytec pcm038"; | ||
| compatible = "phytec,imx27-pcm038", "fsl,imx27"; | ||
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| memory { | ||
| reg = <0x0 0x0>; | ||
| }; | ||
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| soc { | ||
| aipi@10000000 { /* aipi1 */ | ||
| serial@1000a000 { | ||
| status = "okay"; | ||
| }; | ||
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| i2c@1001d000 { | ||
| clock-frequency = <400000>; | ||
| status = "okay"; | ||
| at24@52 { | ||
| compatible = "at,24c32"; | ||
| pagesize = <32>; | ||
| reg = <0x52>; | ||
| }; | ||
| pcf8563@51 { | ||
| compatible = "nxp,pcf8563"; | ||
| reg = <0x51>; | ||
| }; | ||
| lm75@4a { | ||
| compatible = "national,lm75"; | ||
| reg = <0x4a>; | ||
| }; | ||
| }; | ||
| }; | ||
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| aipi@10020000 { /* aipi2 */ | ||
| ethernet@1002b000 { | ||
| phy-reset-gpios = <&gpio3 30 0>; | ||
| status = "okay"; | ||
| }; | ||
| }; | ||
| }; | ||
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| nor_flash@c0000000 { | ||
| compatible = "cfi-flash"; | ||
| bank-width = <2>; | ||
| reg = <0xc0000000 0x02000000>; | ||
| linux,mtd-name = "physmap-flash.0"; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| }; | ||
| }; | ||
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| &cspi1 { | ||
| fsl,spi-num-chipselects = <1>; | ||
| cs-gpios = <&gpio4 28 0>; | ||
| status = "okay"; | ||
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| pmic: mc13783@0 { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| compatible = "fsl,mc13783"; | ||
| spi-max-frequency = <20000000>; | ||
| reg = <0>; | ||
| interrupt-parent = <&gpio2>; | ||
| interrupts = <23 0x4>; | ||
| fsl,mc13xxx-uses-adc; | ||
| fsl,mc13xxx-uses-rtc; | ||
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| regulators { | ||
| sw1a_reg: sw1a { | ||
| regulator-min-microvolt = <1200000>; | ||
| regulator-max-microvolt = <1200000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| sw1b_reg: sw1b { | ||
| regulator-min-microvolt = <1200000>; | ||
| regulator-max-microvolt = <1200000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| sw2a_reg: sw2a { | ||
| regulator-min-microvolt = <1800000>; | ||
| regulator-max-microvolt = <1800000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| sw2b_reg: sw2b { | ||
| regulator-min-microvolt = <1800000>; | ||
| regulator-max-microvolt = <1800000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| sw3_reg: sw3 { | ||
| regulator-min-microvolt = <5000000>; | ||
| regulator-max-microvolt = <5000000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| vaudio_reg: vaudio { | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| violo_reg: violo { | ||
| regulator-min-microvolt = <1800000>; | ||
| regulator-max-microvolt = <1800000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| viohi_reg: viohi { | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| vgen_reg: vgen { | ||
| regulator-min-microvolt = <1500000>; | ||
| regulator-max-microvolt = <1500000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| vcam_reg: vcam { | ||
| regulator-min-microvolt = <2800000>; | ||
| regulator-max-microvolt = <2800000>; | ||
| }; | ||
|
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| vrf1_reg: vrf1 { | ||
| regulator-min-microvolt = <2775000>; | ||
| regulator-max-microvolt = <2775000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
|
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| vrf2_reg: vrf2 { | ||
| regulator-min-microvolt = <2775000>; | ||
| regulator-max-microvolt = <2775000>; | ||
| regulator-always-on; | ||
| regulator-boot-on; | ||
| }; | ||
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| vmmc1_reg: vmmc1 { | ||
| regulator-min-microvolt = <1600000>; | ||
| regulator-max-microvolt = <3000000>; | ||
| }; | ||
|
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| gpo1_reg: gpo1 { }; | ||
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| pwgt1spi_reg: pwgt1spi { | ||
| regulator-always-on; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
|
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| &nfc { | ||
| nand-bus-width = <8>; | ||
| nand-ecc-mode = "hw"; | ||
| status = "okay"; | ||
| }; |
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