---

yaml
---
r: 65873
b: refs/heads/master
c: 6f074ab
h: refs/heads/master
i:
  65871: eea2783
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: ccbe64c664f2e3a86430ef63c974e38ac1cd5b93
+refs/heads/master: 6f074abb624aced31339a0f8fac778b344adac4c

trunk/drivers/media/video/cx23885/cx23885-core.c

@@ -1252,20 +1252,23 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id)
 	struct cx23885_dev *dev = dev_id;
 	struct cx23885_tsport *port = &dev->ts2;
 	u32 pci_status, pci_mask;
+	u32 ts1_status, ts1_mask;
 	u32 ts2_status, ts2_mask;
 	int count = 0, handled = 0;
 
 	pci_status = cx_read(PCI_INT_STAT);
 	pci_mask = cx_read(PCI_INT_MSK);
-
+	ts1_status = cx_read(VID_B_INT_STAT);
+	ts1_mask = cx_read(VID_B_INT_MSK);
 	ts2_status = cx_read(VID_C_INT_STAT);
 	ts2_mask = cx_read(VID_C_INT_MSK);
 
-	if ( (pci_status == 0) && (ts2_status == 0) )
+	if ( (pci_status == 0) && (ts2_status == 0) && (ts1_status == 0) )
 		goto out;
 
 	count = cx_read(port->reg_gpcnt);
 	dprintk(7, "pci_status: 0x%08x  pci_mask: 0x%08x\n", pci_status, pci_mask );
+	dprintk(7, "ts1_status: 0x%08x  ts1_mask: 0x%08x count: 0x%x\n", ts1_status, ts1_mask, count );
 	dprintk(7, "ts2_status: 0x%08x  ts2_mask: 0x%08x count: 0x%x\n", ts2_status, ts2_mask, count );
 
 	if ( (pci_status & PCI_MSK_RISC_RD) ||
@@ -1303,6 +1306,48 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id)
 
 	}
 
+	if ( (ts1_status & VID_B_MSK_OPC_ERR) ||
+	     (ts1_status & VID_B_MSK_BAD_PKT) ||
+	     (ts1_status & VID_B_MSK_SYNC) ||
+	     (ts1_status & VID_B_MSK_OF))
+	{
+		if (ts1_status & VID_B_MSK_OPC_ERR)
+			dprintk(7, " (VID_B_MSK_OPC_ERR 0x%08x)\n", VID_B_MSK_OPC_ERR);
+		if (ts1_status & VID_B_MSK_BAD_PKT)
+			dprintk(7, " (VID_B_MSK_BAD_PKT 0x%08x)\n", VID_B_MSK_BAD_PKT);
+		if (ts1_status & VID_B_MSK_SYNC)
+			dprintk(7, " (VID_B_MSK_SYNC    0x%08x)\n", VID_B_MSK_SYNC);
+		if (ts1_status & VID_B_MSK_OF)
+			dprintk(7, " (VID_B_MSK_OF      0x%08x)\n", VID_B_MSK_OF);
+
+		printk(KERN_ERR "%s: mpeg risc op code error\n", dev->name);
+
+		cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
+		cx23885_sram_channel_dump(dev, &dev->sram_channels[ port->sram_chno ]);
+
+	} else if (ts1_status & VID_B_MSK_RISCI1) {
+
+		dprintk(7, " (RISCI1            0x%08x)\n", VID_B_MSK_RISCI1);
+
+		spin_lock(&port->slock);
+		count = cx_read(port->reg_gpcnt);
+		cx23885_wakeup(port, &port->mpegq, count);
+		spin_unlock(&port->slock);
+
+	} else if (ts1_status & VID_B_MSK_RISCI2) {
+
+		dprintk(7, " (RISCI2            0x%08x)\n", VID_B_MSK_RISCI2);
+
+		spin_lock(&port->slock);
+		cx23885_restart_queue(port, &port->mpegq);
+		spin_unlock(&port->slock);
+
+	}
+	if (ts1_status) {
+		cx_write(VID_B_INT_STAT, ts1_status);
+		handled = 1;
+	}
+
 	if ( (ts2_status & VID_C_MSK_OPC_ERR) ||
 	     (ts2_status & VID_C_MSK_BAD_PKT) ||
 	     (ts2_status & VID_C_MSK_SYNC) ||
@@ -1341,9 +1386,13 @@ static irqreturn_t cx23885_irq(int irq, void *dev_id)
 
 	}
 
-	cx_write(VID_C_INT_STAT, ts2_status);
-	cx_write(PCI_INT_STAT, pci_status);
-	handled = 1;
+	if (ts2_status) {
+		cx_write(VID_C_INT_STAT, ts2_status);
+		handled = 1;
+	}
+
+	if (handled)
+		cx_write(PCI_INT_STAT, pci_status);
 out:
 	return IRQ_RETVAL(handled);
 }