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yaml
---
r: 302809
b: refs/heads/master
c: c39f52a
h: refs/heads/master
i:
  302807: bca952d
v: v3
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Thomas Gleixner committed May 5, 2012
1 parent e9cee3f commit ee3b1a1
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Showing 4 changed files with 14 additions and 71 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: cf5e6def83fabdf10a05dc5a5981eda1672cb79c
refs/heads/master: c39f52a9edc5e0687cbb54c08bcd78cf7fe26b62
1 change: 1 addition & 0 deletions trunk/arch/parisc/Kconfig
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Expand Up @@ -18,6 +18,7 @@ config PARISC
select IRQ_PER_CPU
select ARCH_HAVE_NMI_SAFE_CMPXCHG
select GENERIC_SMP_IDLE_THREAD
select HAVE_GENERIC_INIT_TASK

help
The PA-RISC microprocessor is designed by Hewlett-Packard and used
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70 changes: 0 additions & 70 deletions trunk/arch/parisc/kernel/init_task.c

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12 changes: 12 additions & 0 deletions trunk/arch/parisc/mm/init.c
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Expand Up @@ -33,6 +33,18 @@

extern int data_start;

#if PT_NLEVELS == 3
/* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout
* with the first pmd adjacent to the pgd and below it. gcc doesn't actually
* guarantee that global objects will be laid out in memory in the same order
* as the order of declaration, so put these in different sections and use
* the linker script to order them. */
pmd_t pmd0[PTRS_PER_PMD] __attribute__ ((__section__ (".data..vm0.pmd"), aligned(PAGE_SIZE)));
#endif

pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__ ((__section__ (".data..vm0.pgd"), aligned(PAGE_SIZE)));
pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __attribute__ ((__section__ (".data..vm0.pte"), aligned(PAGE_SIZE)));

#ifdef CONFIG_DISCONTIGMEM
struct node_map_data node_data[MAX_NUMNODES] __read_mostly;
unsigned char pfnnid_map[PFNNID_MAP_MAX] __read_mostly;
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