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Merge tag 'please-pull-paravirt' of git://git.kernel.org/pub/scm/linu…
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…x/kernel/git/aegl/linux

Pull ia64 paravirt removal from Tony Luck:
 "Nobody cares about paravirtualization on ia64 anymore"

* tag 'please-pull-paravirt' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux:
  ia64: remove paravirt code
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Linus Torvalds committed Jun 23, 2015
2 parents df68770 + e55645e commit efdfce2
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Showing 33 changed files with 68 additions and 3,317 deletions.
23 changes: 0 additions & 23 deletions arch/ia64/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -137,29 +137,6 @@ config AUDIT_ARCH
bool
default y

menuconfig PARAVIRT_GUEST
bool "Paravirtualized guest support"
depends on BROKEN
help
Say Y here to get to see options related to running Linux under
various hypervisors. This option alone does not add any kernel code.

If you say N, all options in this submenu will be skipped and disabled.

if PARAVIRT_GUEST

config PARAVIRT
bool "Enable paravirtualization code"
depends on PARAVIRT_GUEST
default y
help
This changes the kernel so it can modify itself when it is run
under a hypervisor, potentially improving performance significantly
over full virtualization. However, when run without a hypervisor
the kernel is theoretically slower and slightly larger.

endif

choice
prompt "System type"
default IA64_GENERIC
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8 changes: 0 additions & 8 deletions arch/ia64/include/asm/hw_irq.h
Original file line number Diff line number Diff line change
Expand Up @@ -15,11 +15,7 @@
#include <asm/ptrace.h>
#include <asm/smp.h>

#ifndef CONFIG_PARAVIRT
typedef u8 ia64_vector;
#else
typedef u16 ia64_vector;
#endif

/*
* 0 special
Expand Down Expand Up @@ -114,15 +110,11 @@ DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);

extern struct irq_chip irq_type_ia64_lsapic; /* CPU-internal interrupt controller */

#ifdef CONFIG_PARAVIRT_GUEST
#include <asm/paravirt.h>
#else
#define ia64_register_ipi ia64_native_register_ipi
#define assign_irq_vector ia64_native_assign_irq_vector
#define free_irq_vector ia64_native_free_irq_vector
#define register_percpu_irq ia64_native_register_percpu_irq
#define ia64_resend_irq ia64_native_resend_irq
#endif

extern void ia64_native_register_ipi(void);
extern int bind_irq_vector(int irq, int vector, cpumask_t domain);
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13 changes: 0 additions & 13 deletions arch/ia64/include/asm/intrinsics.h
Original file line number Diff line number Diff line change
Expand Up @@ -7,19 +7,6 @@
#ifndef _ASM_IA64_INTRINSICS_H
#define _ASM_IA64_INTRINSICS_H

#include <asm/paravirt_privop.h>
#include <uapi/asm/intrinsics.h>

#ifndef __ASSEMBLY__
#if defined(CONFIG_PARAVIRT)
# undef IA64_INTRINSIC_API
# undef IA64_INTRINSIC_MACRO
# ifdef ASM_SUPPORTED
# define IA64_INTRINSIC_API(name) paravirt_ ## name
# else
# define IA64_INTRINSIC_API(name) pv_cpu_ops.name
# endif
#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
#endif
#endif /* !__ASSEMBLY__ */
#endif /* _ASM_IA64_INTRINSICS_H */
4 changes: 0 additions & 4 deletions arch/ia64/include/asm/iosapic.h
Original file line number Diff line number Diff line change
Expand Up @@ -55,14 +55,10 @@

#define NR_IOSAPICS 256

#ifdef CONFIG_PARAVIRT_GUEST
#include <asm/paravirt.h>
#else
#define iosapic_pcat_compat_init ia64_native_iosapic_pcat_compat_init
#define __iosapic_read __ia64_native_iosapic_read
#define __iosapic_write __ia64_native_iosapic_write
#define iosapic_get_irq_chip ia64_native_iosapic_get_irq_chip
#endif

extern void __init ia64_native_iosapic_pcat_compat_init(void);
extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger);
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6 changes: 0 additions & 6 deletions arch/ia64/include/asm/module.h
Original file line number Diff line number Diff line change
Expand Up @@ -18,12 +18,6 @@ struct mod_arch_specific {
struct elf64_shdr *got; /* global offset table */
struct elf64_shdr *opd; /* official procedure descriptors */
struct elf64_shdr *unwind; /* unwind-table section */
#ifdef CONFIG_PARAVIRT
struct elf64_shdr *paravirt_bundles;
/* paravirt_alt_bundle_patch table */
struct elf64_shdr *paravirt_insts;
/* paravirt_alt_inst_patch table */
#endif
unsigned long gp; /* global-pointer for module */

void *core_unw_table; /* core unwind-table cookie returned by unwinder */
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103 changes: 21 additions & 82 deletions arch/ia64/include/asm/native/inst.h
Original file line number Diff line number Diff line change
Expand Up @@ -22,32 +22,6 @@

#define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN

#define __paravirt_switch_to ia64_native_switch_to
#define __paravirt_leave_syscall ia64_native_leave_syscall
#define __paravirt_work_processed_syscall ia64_native_work_processed_syscall
#define __paravirt_leave_kernel ia64_native_leave_kernel
#define __paravirt_pending_syscall_end ia64_work_pending_syscall_end
#define __paravirt_work_processed_syscall_target \
ia64_work_processed_syscall

#define paravirt_fsyscall_table ia64_native_fsyscall_table
#define paravirt_fsys_bubble_down ia64_native_fsys_bubble_down

#ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
# define PARAVIRT_POISON 0xdeadbeefbaadf00d
# define CLOBBER(clob) \
;; \
movl clob = PARAVIRT_POISON; \
;;
# define CLOBBER_PRED(pred_clob) \
;; \
cmp.eq pred_clob, p0 = r0, r0 \
;;
#else
# define CLOBBER(clob) /* nothing */
# define CLOBBER_PRED(pred_clob) /* nothing */
#endif

#define MOV_FROM_IFA(reg) \
mov reg = cr.ifa

Expand All @@ -70,122 +44,87 @@
mov reg = cr.iip

#define MOV_FROM_IVR(reg, clob) \
mov reg = cr.ivr \
CLOBBER(clob)
mov reg = cr.ivr

#define MOV_FROM_PSR(pred, reg, clob) \
(pred) mov reg = psr \
CLOBBER(clob)
(pred) mov reg = psr

#define MOV_FROM_ITC(pred, pred_clob, reg, clob) \
(pred) mov reg = ar.itc \
CLOBBER(clob) \
CLOBBER_PRED(pred_clob)
(pred) mov reg = ar.itc

#define MOV_TO_IFA(reg, clob) \
mov cr.ifa = reg \
CLOBBER(clob)
mov cr.ifa = reg

#define MOV_TO_ITIR(pred, reg, clob) \
(pred) mov cr.itir = reg \
CLOBBER(clob)
(pred) mov cr.itir = reg

#define MOV_TO_IHA(pred, reg, clob) \
(pred) mov cr.iha = reg \
CLOBBER(clob)
(pred) mov cr.iha = reg

#define MOV_TO_IPSR(pred, reg, clob) \
(pred) mov cr.ipsr = reg \
CLOBBER(clob)
(pred) mov cr.ipsr = reg

#define MOV_TO_IFS(pred, reg, clob) \
(pred) mov cr.ifs = reg \
CLOBBER(clob)
(pred) mov cr.ifs = reg

#define MOV_TO_IIP(reg, clob) \
mov cr.iip = reg \
CLOBBER(clob)
mov cr.iip = reg

#define MOV_TO_KR(kr, reg, clob0, clob1) \
mov IA64_KR(kr) = reg \
CLOBBER(clob0) \
CLOBBER(clob1)
mov IA64_KR(kr) = reg

#define ITC_I(pred, reg, clob) \
(pred) itc.i reg \
CLOBBER(clob)
(pred) itc.i reg

#define ITC_D(pred, reg, clob) \
(pred) itc.d reg \
CLOBBER(clob)
(pred) itc.d reg

#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
(pred_i) itc.i reg; \
(pred_d) itc.d reg \
CLOBBER(clob)
(pred_d) itc.d reg

#define THASH(pred, reg0, reg1, clob) \
(pred) thash reg0 = reg1 \
CLOBBER(clob)
(pred) thash reg0 = reg1

#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
ssm psr.ic | PSR_DEFAULT_BITS \
CLOBBER(clob0) \
CLOBBER(clob1) \
;; \
srlz.i /* guarantee that interruption collectin is on */ \
;;

#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
ssm psr.ic \
CLOBBER(clob0) \
CLOBBER(clob1) \
;; \
srlz.d

#define RSM_PSR_IC(clob) \
rsm psr.ic \
CLOBBER(clob)
rsm psr.ic

#define SSM_PSR_I(pred, pred_clob, clob) \
(pred) ssm psr.i \
CLOBBER(clob) \
CLOBBER_PRED(pred_clob)
(pred) ssm psr.i

#define RSM_PSR_I(pred, clob0, clob1) \
(pred) rsm psr.i \
CLOBBER(clob0) \
CLOBBER(clob1)
(pred) rsm psr.i

#define RSM_PSR_I_IC(clob0, clob1, clob2) \
rsm psr.i | psr.ic \
CLOBBER(clob0) \
CLOBBER(clob1) \
CLOBBER(clob2)
rsm psr.i | psr.ic

#define RSM_PSR_DT \
rsm psr.dt

#define RSM_PSR_BE_I(clob0, clob1) \
rsm psr.be | psr.i \
CLOBBER(clob0) \
CLOBBER(clob1)
rsm psr.be | psr.i

#define SSM_PSR_DT_AND_SRLZ_I \
ssm psr.dt \
;; \
srlz.i

#define BSW_0(clob0, clob1, clob2) \
bsw.0 \
CLOBBER(clob0) \
CLOBBER(clob1) \
CLOBBER(clob2)
bsw.0

#define BSW_1(clob0, clob1) \
bsw.1 \
CLOBBER(clob0) \
CLOBBER(clob1)
bsw.1

#define COVER \
cover
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