---

yaml
---
r: 454
b: refs/heads/master
c: 275cfdf
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: a1342206e192709a405485dbe2e647d5c4005d20
+refs/heads/master: 275cfdf412aee2367883b6cd764e06c07bd37a79

trunk/Documentation/networking/netdevices.txt

@@ -51,8 +51,6 @@ dev->hard_start_xmit:
 	set_multicast_list
 	Context: BHs disabled
 	Notes: netif_queue_stopped() is guaranteed false
-               Interrupts must be enabled when calling hard_start_xmit.
-                (Interrupts must also be enabled when enabling the BH handler.)
 	Return codes: 
 	o NETDEV_TX_OK everything ok. 
 	o NETDEV_TX_BUSY Cannot transmit packet, try later 

trunk/arch/arm/mach-pxa/sleep.S

@@ -18,11 +18,6 @@
 
 #include <asm/arch/pxa-regs.h>
 
-#ifdef CONFIG_PXA27x			// workaround for Errata 50
-#define MDREFR_KDIV	0x200a4000	// all banks
-#define CCCR_SLEEP	0x00000107	// L=7 2N=2 A=0 PPDIS=0 CPDIS=0
-#endif
-
 		.text
 
 /*
@@ -33,9 +28,7 @@
 
 ENTRY(pxa_cpu_suspend)
 
-#ifndef CONFIG_IWMMXT
 	mra	r2, r3, acc0
-#endif
 	stmfd	sp!, {r2 - r12, lr}		@ save registers on stack
 
 	@ get coprocessor registers
@@ -68,23 +61,14 @@ ENTRY(pxa_cpu_suspend)
 	@ prepare value for sleep mode
 	mov	r1, #3				@ sleep mode
 
-	@ prepare pointer to physical address 0 (virtual mapping in generic.c)
-	mov	r2, #UNCACHED_PHYS_0
-
-	@ prepare SDRAM refresh settings
+	@ prepare to put SDRAM into self-refresh manually
 	ldr	r4, =MDREFR
 	ldr	r5, [r4]
-
-	@ enable SDRAM self-refresh mode
 	orr	r5, r5, #MDREFR_SLFRSH
 
-#ifdef CONFIG_PXA27x
-	@ set SDCLKx divide-by-2 bits (this is part of a workaround for Errata 50)
-	ldr	r6, =MDREFR_KDIV
-	orr	r5, r5, r6
-#endif
+	@ prepare pointer to physical address 0 (virtual mapping in generic.c)
+	mov	r2, #UNCACHED_PHYS_0
 
-#ifdef CONFIG_PXA25x
 	@ Intel PXA255 Specification Update notes problems
 	@ about suspending with PXBus operating above 133MHz
 	@ (see Errata 31, GPIO output signals, ... unpredictable in sleep
@@ -116,18 +100,6 @@ ENTRY(pxa_cpu_suspend)
 	mov	r0, #0
 	mcr	p14, 0, r0, c6, c0, 0
 	orr	r0, r0, #2			@ initiate change bit
-#endif
-#ifdef CONFIG_PXA27x
-	@ Intel PXA270 Specification Update notes problems sleeping
-	@ with core operating above 91 MHz
-	@ (see Errata 50, ...processor does not exit from sleep...)
-
-	ldr	r6, =CCCR
-	ldr	r8, [r6]		@ keep original value for resume
-
-	ldr	r7, =CCCR_SLEEP		@ prepare CCCR sleep value
-	mov	r0, #0x2		@ prepare value for CLKCFG
-#endif
 
 	@ align execution to a cache line
 	b	1f
@@ -139,35 +111,21 @@ ENTRY(pxa_cpu_suspend)
 	@ All needed values are now in registers.
 	@ These last instructions should be in cache
 
-#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
 	@ initiate the frequency change...
 	str	r7, [r6]
 	mcr	p14, 0, r0, c6, c0, 0
 
 	@ restore the original cpu speed value for resume
 	str	r8, [r6]
 
-	@ need 6 13-MHz cycles before changing PWRMODE
-	@ just set frequency to 91-MHz... 6*91/13 = 42
-
-	mov	r0, #42
-10:	subs	r0, r0, #1
-	bne	10b
-#endif
-
-	@ Do not reorder...
-	@ Intel PXA270 Specification Update notes problems performing
-	@ external accesses after SDRAM is put in self-refresh mode
-	@ (see Errata 39 ...hangs when entering self-refresh mode)
+	@ put SDRAM into self-refresh
+	str	r5, [r4]
 
 	@ force address lines low by reading at physical address 0
 	ldr	r3, [r2]
 
-	@ put SDRAM into self-refresh
-	str	r5, [r4]
-
 	@ enter sleep mode
-	mcr	p14, 0, r1, c7, c0, 0		@ PWRMODE
+	mcr	p14, 0, r1, c7, c0, 0
 
 20:	b	20b				@ loop waiting for sleep
 
@@ -230,9 +188,7 @@ resume_after_mmu:
 	bl	cpu_xscale_proc_init
 #endif
 	ldmfd	sp!, {r2, r3}
-#ifndef CONFIG_IWMMXT
 	mar	acc0, r2, r3
-#endif
 	ldmfd	sp!, {r4 - r12, pc}		@ return to caller
 
 

trunk/arch/ia64/ia32/ia32_signal.c

@@ -460,9 +460,10 @@ __ia32_rt_sigsuspend (compat_sigset_t *sset, unsigned int sigsetsize, struct sig
 	sigset_t oldset, set;
 
 	scr->scratch_unat = 0;	/* avoid leaking kernel bits to user level */
-	memset(&set, 0, sizeof(set));
+	memset(&set, 0, sizeof(&set));
 
-	memcpy(&set.sig, &sset->sig, sigsetsize);
+	if (memcpy(&set.sig, &sset->sig, sigsetsize))
+		return -EFAULT;
 
 	sigdelsetmask(&set, ~_BLOCKABLE);