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bounce: allow use of bounce pool via config option
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The tilegx USB OHCI support needs the bounce pool since we're not
using the IOMMU to handle 32-bit addresses.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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Chris Metcalf committed Jul 18, 2012
1 parent 47fc28b commit f100625
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Showing 2 changed files with 11 additions and 3 deletions.
6 changes: 6 additions & 0 deletions arch/tile/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -406,6 +406,12 @@ config TILE_USB
Provides USB host adapter support for the built-in EHCI and OHCI
interfaces on TILE-Gx chips.

# USB OHCI needs the bounce pool since tilegx will often have more
# than 4GB of memory, but we don't currently use the IOTLB to present
# a 32-bit address to OHCI. So we need to use a bounce pool instead.
config NEED_BOUNCE_POOL
def_bool USB_OHCI_HCD

config HOTPLUG
bool "Support for hot-pluggable devices"
---help---
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8 changes: 5 additions & 3 deletions mm/bounce.c
Original file line number Diff line number Diff line change
Expand Up @@ -24,23 +24,25 @@

static mempool_t *page_pool, *isa_page_pool;

#ifdef CONFIG_HIGHMEM
#if defined(CONFIG_HIGHMEM) || defined(CONFIG_NEED_BOUNCE_POOL)
static __init int init_emergency_pool(void)
{
#ifndef CONFIG_MEMORY_HOTPLUG
#if defined(CONFIG_HIGHMEM) && !defined(CONFIG_MEMORY_HOTPLUG)
if (max_pfn <= max_low_pfn)
return 0;
#endif

page_pool = mempool_create_page_pool(POOL_SIZE, 0);
BUG_ON(!page_pool);
printk("highmem bounce pool size: %d pages\n", POOL_SIZE);
printk("bounce pool size: %d pages\n", POOL_SIZE);

return 0;
}

__initcall(init_emergency_pool);
#endif

#ifdef CONFIG_HIGHMEM
/*
* highmem version, map in to vec
*/
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