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spi-topcliff-pch: supports a spi mode setup and bit order setup by IO…
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… control

This patch supports a spi mode setup and bit order setup by IO control.
    spi mode:     mode 0 to mode 3
    bit order:    LSB first, MSB first

Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Tomoya MORINAGA authored and Grant Likely committed Mar 10, 2012
1 parent 7d05b3e commit f258b44
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1 change: 1 addition & 0 deletions drivers/spi/spi-topcliff-pch.c
Original file line number Diff line number Diff line change
Expand Up @@ -1434,6 +1434,7 @@ static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev)
master->num_chipselect = PCH_MAX_CS;
master->setup = pch_spi_setup;
master->transfer = pch_spi_transfer;
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;

data->board_dat = board_dat;
data->plat_dev = plat_dev;
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