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yaml
---
r: 154860
b: refs/heads/master
c: eb9b514
h: refs/heads/master
v: v3
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Tim Anderson authored and Ralf Baechle committed Jul 3, 2009
1 parent 2c287d3 commit f25a596
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Showing 3 changed files with 18 additions and 17 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 47b178bb69ea4d0043f2df509c714bc5b287f375
refs/heads/master: eb9b5141a9815ef898ef6b6441f733e81c272600
2 changes: 1 addition & 1 deletion trunk/arch/mips/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -1656,7 +1656,7 @@ config MIPS_APSP_KSPD
config MIPS_CMP
bool "MIPS CMP framework support"
depends on SYS_SUPPORTS_MIPS_CMP
select SYNC_R4K if BROKEN
select SYNC_R4K
select SYS_SUPPORTS_SMP
select SYS_SUPPORTS_SCHED_SMT if SMP
select WEAK_ORDERING
Expand Down
31 changes: 16 additions & 15 deletions trunk/arch/mips/kernel/sync-r4k.c
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
/*
* Count register synchronisation.
*
* All CPUs will have their count registers synchronised to the CPU0 expirelo
* All CPUs will have their count registers synchronised to the CPU0 next time
* value. This can cause a small timewarp for CPU0. All other CPU's should
* not have done anything significant (but they may have had interrupts
* enabled briefly - prom_smp_finish() should not be responsible for enabling
Expand All @@ -13,21 +13,22 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irqflags.h>
#include <linux/r4k-timer.h>
#include <linux/cpumask.h>

#include <asm/r4k-timer.h>
#include <asm/atomic.h>
#include <asm/barrier.h>
#include <asm/cpumask.h>
#include <asm/mipsregs.h>

static atomic_t __initdata count_start_flag = ATOMIC_INIT(0);
static atomic_t __initdata count_count_start = ATOMIC_INIT(0);
static atomic_t __initdata count_count_stop = ATOMIC_INIT(0);
static atomic_t __cpuinitdata count_start_flag = ATOMIC_INIT(0);
static atomic_t __cpuinitdata count_count_start = ATOMIC_INIT(0);
static atomic_t __cpuinitdata count_count_stop = ATOMIC_INIT(0);
static atomic_t __cpuinitdata count_reference = ATOMIC_INIT(0);

#define COUNTON 100
#define NR_LOOPS 5

void __init synchronise_count_master(void)
void __cpuinit synchronise_count_master(void)
{
int i;
unsigned long flags;
Expand All @@ -42,19 +43,20 @@ void __init synchronise_count_master(void)
return;
#endif

pr_info("Checking COUNT synchronization across %u CPUs: ",
num_online_cpus());
printk(KERN_INFO "Synchronize counters across %u CPUs: ",
num_online_cpus());

local_irq_save(flags);

/*
* Notify the slaves that it's time to start
*/
atomic_set(&count_reference, read_c0_count());
atomic_set(&count_start_flag, 1);
smp_wmb();

/* Count will be initialised to expirelo for all CPU's */
initcount = expirelo;
/* Count will be initialised to current timer for all CPU's */
initcount = read_c0_count();

/*
* We loop a few times to get a primed instruction cache,
Expand Down Expand Up @@ -106,7 +108,7 @@ void __init synchronise_count_master(void)
printk("done.\n");
}

void __init synchronise_count_slave(void)
void __cpuinit synchronise_count_slave(void)
{
int i;
unsigned long flags;
Expand All @@ -131,8 +133,8 @@ void __init synchronise_count_slave(void)
while (!atomic_read(&count_start_flag))
mb();

/* Count will be initialised to expirelo for all CPU's */
initcount = expirelo;
/* Count will be initialised to next expire for all CPU's */
initcount = atomic_read(&count_reference);

ncpus = num_online_cpus();
for (i = 0; i < NR_LOOPS; i++) {
Expand All @@ -156,4 +158,3 @@ void __init synchronise_count_slave(void)
local_irq_restore(flags);
}
#undef NR_LOOPS
#endif

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