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mtd: decommission the NAND museum
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The MTD subsystem has its own small museum of ancient NANDs in a form of the
CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains stone age
NANDs with 256 bytes pages, as well as iron age NANDs with 512 bytes per page
and up to 8MiB page size.

It is with great sorrow that I inform you that the museum is being
decommissioned. The MTD subsystem is out of budget for Kconfig options and
already has too many of them, and there is a general kernel trend to simplify
the configuration menu.

We remove the stone age exhibits along with closing the museum, but some of the
iron age ones are transferred to the regular NAND depot. Namely, only those
which have unique device IDs are transferred, and the ones which have
conflicting device IDs are removed.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Artem Bityutskiy authored and David Woodhouse committed Apr 5, 2013
1 parent 7d321ec commit f7025a4
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Showing 2 changed files with 5 additions and 25 deletions.
8 changes: 0 additions & 8 deletions drivers/mtd/nand/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -41,14 +41,6 @@ config MTD_SM_COMMON
tristate
default n

config MTD_NAND_MUSEUM_IDS
bool "Enable chip ids for obsolete ancient NAND devices"
default n
help
Enable this option only when your board has first generation
NAND chips (page size 256 byte, erase size 4-8KiB). The IDs
of these chips were reused by later, larger chips.

config MTD_NAND_DENALI
tristate "Support Denali NAND controller"
help
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22 changes: 5 additions & 17 deletions drivers/mtd/nand/nand_ids.c
Original file line number Diff line number Diff line change
Expand Up @@ -25,23 +25,11 @@
* extended chip ID.
*/
struct nand_flash_dev nand_flash_ids[] = {
#ifdef CONFIG_MTD_NAND_MUSEUM_IDS
{"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, SP_OPTIONS},
{"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, SP_OPTIONS},
{"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, SP_OPTIONS},
{"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, SP_OPTIONS},
{"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, SP_OPTIONS},
{"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, SP_OPTIONS},
{"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, SP_OPTIONS},
{"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, SP_OPTIONS},
{"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, SP_OPTIONS},
{"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, SP_OPTIONS},

{"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, SP_OPTIONS},
{"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, SP_OPTIONS},
{"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, SP_OPTIONS16},
{"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, SP_OPTIONS16},
#endif
{"NAND 4MiB 5V 8-bit", 0x6B, 512, 4, 0x2000, SP_OPTIONS},
{"NAND 4MiB 3,3V 8-bit", 0xE3, 512, 4, 0x2000, SP_OPTIONS},
{"NAND 4MiB 3,3V 8-bit", 0xE5, 512, 4, 0x2000, SP_OPTIONS},
{"NAND 8MiB 3,3V 8-bit", 0xD6, 512, 8, 0x2000, SP_OPTIONS},
{"NAND 8MiB 3,3V 8-bit", 0xE6, 512, 8, 0x2000, SP_OPTIONS},

{"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, SP_OPTIONS},
{"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, SP_OPTIONS},
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