Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history
yaml
---
r: 70984
b: refs/heads/master
c: 6619a8f
h: refs/heads/master
v: v3
  • Loading branch information
H. Peter Anvin authored and Thomas Gleixner committed Oct 17, 2007
1 parent 981d4cc commit f70b1c5
Show file tree
Hide file tree
Showing 7 changed files with 21 additions and 11 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 9689ba8ad0dc27c0a2ce40eb4c0f8fb66551119c
refs/heads/master: 6619a8fb594486363783cc4a8372e4d4ee4b913e
4 changes: 2 additions & 2 deletions trunk/arch/x86/kernel/tce_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -40,9 +40,9 @@ static inline void flush_tce(void* tceaddr)
{
/* a single tce can't cross a cache line */
if (cpu_has_clflush)
asm volatile("clflush (%0)" :: "r" (tceaddr));
clflush(tceaddr);
else
asm volatile("wbinvd":::"memory");
wbinvd();
}

void tce_build(struct iommu_table *tbl, unsigned long index,
Expand Down
4 changes: 2 additions & 2 deletions trunk/arch/x86/mm/pageattr_32.c
Original file line number Diff line number Diff line change
Expand Up @@ -70,10 +70,10 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot,

static void cache_flush_page(struct page *p)
{
unsigned long adr = (unsigned long)page_address(p);
void *adr = page_address(p);
int i;
for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
asm volatile("clflush (%0)" :: "r" (adr + i));
clflush(adr+i);
}

static void flush_kernel_map(void *arg)
Expand Down
2 changes: 1 addition & 1 deletion trunk/arch/x86/mm/pageattr_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -65,7 +65,7 @@ static void cache_flush_page(void *adr)
{
int i;
for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
asm volatile("clflush (%0)" :: "r" (adr + i));
clflush(adr+i);
}

static void flush_kernel_map(void *arg)
Expand Down
11 changes: 6 additions & 5 deletions trunk/drivers/char/agp/efficeon-agp.c
Original file line number Diff line number Diff line change
Expand Up @@ -221,7 +221,7 @@ static int efficeon_create_gatt_table(struct agp_bridge_data *bridge)
SetPageReserved(virt_to_page((char *)page));

for (offset = 0; offset < PAGE_SIZE; offset += clflush_chunk)
asm volatile("clflush %0" : : "m" (*(char *)(page+offset)));
clflush((char *)page+offset);

efficeon_private.l1_table[index] = page;

Expand Down Expand Up @@ -268,15 +268,16 @@ static int efficeon_insert_memory(struct agp_memory * mem, off_t pg_start, int t
*page = insert;

/* clflush is slow, so don't clflush until we have to */
if ( last_page &&
((unsigned long)page^(unsigned long)last_page) & clflush_mask )
asm volatile("clflush %0" : : "m" (*last_page));
if (last_page &&
(((unsigned long)page^(unsigned long)last_page) &
clflush_mask))
clflush(last_page);

last_page = page;
}

if ( last_page )
asm volatile("clflush %0" : : "m" (*last_page));
clflush(last_page);

agp_bridge->driver->tlb_flush(mem);
return 0;
Expand Down
4 changes: 4 additions & 0 deletions trunk/include/asm-x86/system_32.h
Original file line number Diff line number Diff line change
Expand Up @@ -161,6 +161,10 @@ static inline void native_wbinvd(void)
asm volatile("wbinvd": : :"memory");
}

static inline void clflush(volatile void *__p)
{
asm volatile("clflush %0" : "+m" (*(char __force *)__p));
}

#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
Expand Down
5 changes: 5 additions & 0 deletions trunk/include/asm-x86/system_64.h
Original file line number Diff line number Diff line change
Expand Up @@ -137,6 +137,11 @@ static inline void write_cr8(unsigned long val)

#endif /* __KERNEL__ */

static inline void clflush(volatile void *__p)
{
asm volatile("clflush %0" : "+m" (*(char __force *)__p));
}

#define nop() __asm__ __volatile__ ("nop")

#ifdef CONFIG_SMP
Expand Down

0 comments on commit f70b1c5

Please sign in to comment.