[ARM] 3192/1: Remove gpio_isr_line_clear() API from IXP4xx

Patch from Deepak Saxena Other than interrupt masking purposes, this API is only used when configuring interrupt lines and this patch moves that functionality directly into the ixp4xx_set_irq_type() implementation as board level PCI code should not need to worry about those details. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
git-mirror · Jan 4, 2006 · f7e8bbb · f7e8bbb
1 parent b3a9624
commit f7e8bbb
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Showing 7 changed files with 3 additions and 28 deletions.
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
@@ -142,6 +142,8 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
 	*int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR <<
 	    		(line * IXP4XX_GPIO_STYLE_SIZE));
 
+	*IXP4XX_GPIO_GPISR = (1 << line);
+
 	/* Set the new style */
 	*int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
 
@@ -169,7 +171,7 @@ static void ixp4xx_irq_ack(unsigned int irq)
 	int line = (irq < 32) ? irq2gpio[irq] : -1;
 
 	if (line >= 0)
-		gpio_line_isr_clear(line);
+		*IXP4XX_GPIO_GPISR = (1 << line);
 }
 
 /*

diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -33,9 +33,6 @@ void __init coyote_pci_preinit(void)
 	set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW);
 	set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW);
 
-	gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN);
-	gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN);
-
 	ixp4xx_pci_preinit();
 }
 

diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c
@@ -32,11 +32,6 @@ void __init ixdp425_pci_preinit(void)
 	set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW);
 	set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW);
 
-	gpio_line_isr_clear(IXDP425_PCI_INTA_PIN);
-	gpio_line_isr_clear(IXDP425_PCI_INTB_PIN);
-	gpio_line_isr_clear(IXDP425_PCI_INTC_PIN);
-	gpio_line_isr_clear(IXDP425_PCI_INTD_PIN);
-
 	ixp4xx_pci_preinit();
 }
 

diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c
@@ -32,9 +32,6 @@ void __init ixdpg425_pci_preinit(void)
 	set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
 	set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW);
 
-	gpio_line_isr_clear(6);
-	gpio_line_isr_clear(7);
-
 	ixp4xx_pci_preinit();
 }
 

diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
@@ -28,14 +28,6 @@ void __init nslu2_pci_preinit(void)
 	set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW);
 	set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW);
 
-	gpio_line_isr_clear(NSLU2_PCI_INTA_PIN);
-	gpio_line_isr_clear(NSLU2_PCI_INTB_PIN);
-	gpio_line_isr_clear(NSLU2_PCI_INTC_PIN);
-
-	/* INTD is not configured as GPIO is used
-	 * for the power input button.
-	 */
-
 	ixp4xx_pci_preinit();
 }
 

diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c
@@ -54,9 +54,6 @@ static int __init nslu2_power_init(void)
 	set_irq_type(NSLU2_RB_IRQ, IRQT_LOW);
 	set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH);
 
-	gpio_line_isr_clear(NSLU2_RB_GPIO);
-	gpio_line_isr_clear(NSLU2_PB_GPIO);
-
 	if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler,
 		SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) {
 

diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
@@ -112,10 +112,5 @@ static inline void gpio_line_set(u8 line, int value)
 	    *IXP4XX_GPIO_GPOUTR &= ~(1 << line);
 }
 
-static inline void gpio_line_isr_clear(u8 line)
-{
-	*IXP4XX_GPIO_GPISR = (1 << line);
-}
-
 #endif // __ASSEMBLY__