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yaml
---
r: 116134
b: refs/heads/master
c: 81b6699
h: refs/heads/master
v: v3
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Paul Mundt committed Sep 17, 2008
1 parent 36b7d3b commit f7f5bde
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Showing 4 changed files with 40 additions and 62 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 8a80a5e9e89cf3aacf8165dd34b40c7c3fe91b4d
refs/heads/master: 81b669952ed5fe0d6f65f8b9a97d1fdeac93ff10
40 changes: 39 additions & 1 deletion trunk/arch/sh/include/asm/processor.h
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Expand Up @@ -3,6 +3,7 @@

#include <asm/cpu-features.h>
#include <asm/segment.h>
#include <asm/cache.h>

#ifndef __ASSEMBLY__
/*
Expand Down Expand Up @@ -43,8 +44,45 @@ enum cpu_type {
CPU_SH_NONE
};

/*
* TLB information structure
*
* Defined for both I and D tlb, per-processor.
*/
struct tlb_info {
unsigned long long next;
unsigned long long first;
unsigned long long last;

unsigned int entries;
unsigned int step;

unsigned long flags;
};

struct sh_cpuinfo {
unsigned int type;
int cut_major, cut_minor;
unsigned long loops_per_jiffy;
unsigned long asid_cache;

struct cache_info icache; /* Primary I-cache */
struct cache_info dcache; /* Primary D-cache */
struct cache_info scache; /* Secondary cache */

/* TLB info */
struct tlb_info itlb;
struct tlb_info dtlb;

unsigned long flags;
} __attribute__ ((aligned(L1_CACHE_BYTES)));

extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]

/* Forward decl */
struct sh_cpuinfo;
struct seq_operations;

extern struct pt_regs fake_swapper_regs;
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19 changes: 0 additions & 19 deletions trunk/arch/sh/include/asm/processor_32.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,6 @@
#include <linux/linkage.h>
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/ptrace.h>

/*
Expand All @@ -27,24 +26,6 @@
#define CCN_CVR 0xff000040
#define CCN_PRR 0xff000044

struct sh_cpuinfo {
unsigned int type;
int cut_major, cut_minor;
unsigned long loops_per_jiffy;
unsigned long asid_cache;

struct cache_info icache; /* Primary I-cache */
struct cache_info dcache; /* Primary D-cache */
struct cache_info scache; /* Secondary cache */

unsigned long flags;
} __attribute__ ((aligned(L1_CACHE_BYTES)));

extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]

asmlinkage void __init sh_cpu_init(void);

/*
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41 changes: 0 additions & 41 deletions trunk/arch/sh/include/asm/processor_64.h
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,6 @@
#include <linux/compiler.h>
#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/ptrace.h>
#include <cpu/registers.h>

Expand All @@ -36,46 +35,6 @@ __asm__("gettr tr0, %1\n\t" \
: "1" (__dummy)); \
pc; })

/*
* TLB information structure
*
* Defined for both I and D tlb, per-processor.
*/
struct tlb_info {
unsigned long long next;
unsigned long long first;
unsigned long long last;

unsigned int entries;
unsigned int step;

unsigned long flags;
};

struct sh_cpuinfo {
enum cpu_type type;
unsigned long loops_per_jiffy;
unsigned long asid_cache;

unsigned int cpu_clock, master_clock, bus_clock, module_clock;

/* Cache info */
struct cache_info icache;
struct cache_info dcache;
struct cache_info scache;

/* TLB info */
struct tlb_info itlb;
struct tlb_info dtlb;

unsigned long flags;
};

extern struct sh_cpuinfo cpu_data[];
#define boot_cpu_data cpu_data[0]
#define current_cpu_data cpu_data[smp_processor_id()]
#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]

#endif

/*
Expand Down

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