staging: rtl8192e: Remove internal references to RTL8192E

Now that the code can only generate a driver for RTL8192E, the internal ifdef's are no longer needed. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
git-mirror · Aug 24, 2011 · f8f3b8a · f8f3b8a
1 parent eb37802
commit f8f3b8a
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Showing 9 changed files with 10 additions and 206 deletions.
diff --git a/drivers/staging/rtl8192e/Makefile b/drivers/staging/rtl8192e/Makefile
@@ -1,6 +1,3 @@
-NIC_SELECT = RTL8192E
-
-ccflags-y += -DRTL8192E
 ccflags-y += -DEEPROM_OLD_FORMAT_SUPPORT=1
 ccflags-y += -DUSE_FW_SOURCE_IMG_FILE
 ccflags-y += -DENABLE_GPIO_RADIO_CTL

diff --git a/drivers/staging/rtl8192e/r8190P_rtl8256.c b/drivers/staging/rtl8192e/r8190P_rtl8256.c
@@ -187,7 +187,6 @@ void PHY_SetRF8256CCKTxPower(struct net_device*	dev, u8	powerlevel)
 {
 	u32	TxAGC=0;
 	struct r8192_priv *priv = rtllib_priv(dev);
-	#ifdef RTL8192E
 
 	TxAGC = powerlevel;
 	if (priv->bDynamicTxLowPower == true)
@@ -200,14 +199,12 @@ void PHY_SetRF8256CCKTxPower(struct net_device*	dev, u8	powerlevel)
 	if (TxAGC > 0x24)
 		TxAGC = 0x24;
 	rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
-	#endif
 }
 
 
 void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
 {
 	struct r8192_priv *priv = rtllib_priv(dev);
-#ifdef RTL8192E
 	u32 writeVal, powerBase0, powerBase1, writeVal_tmp;
 	u8 index = 0;
 	u16 RegOffset[6] = {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c};
@@ -251,6 +248,5 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel)
 		rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
 	}
 
-#endif
 	return;
 }
diff --git a/drivers/staging/rtl8192e/r8192E_dev.c b/drivers/staging/rtl8192e/r8192E_dev.c
@@ -322,10 +322,8 @@ rtl8192e_SetHwReg(struct net_device *dev,u8 variable,u8* val)
 
                 case HW_VAR_RF_TIMING:
 		{
-#ifdef RTL8192E
 			u8 Rf_Timing = *((u8*)val);
 			write_nic_byte(dev, rFPGA0_RFTiming1, Rf_Timing);
-#endif
 		}
 		break;
 
@@ -340,9 +338,7 @@ static void rtl8192_read_eeprom_info(struct net_device* dev)
 	struct r8192_priv *priv = rtllib_priv(dev);
 
 	u8			tempval;
-#ifdef RTL8192E
 	u8			ICVer8192, ICVer8256;
-#endif
 	u16			i,usValue, IC_Version;
 	u16			EEPROMId;
 	u8 bMac_Tmp_Addr[6] = {0x00, 0xe0, 0x4c, 0x00, 0x00, 0x01};
@@ -773,9 +769,7 @@ bool rtl8192_adapter_start(struct net_device *dev)
 	u32 ulRegRead;
 	bool rtStatus = true;
 	u8 tmpvalue;
-#ifdef RTL8192E
 	u8 ICVersion,SwitchingRegulatorOutput;
-#endif
 	bool bfirmwareok = true;
 	u32 tmpRegA, tmpRegC, TempCCk;
 	int i = 0;
@@ -791,13 +785,11 @@ bool rtl8192_adapter_start(struct net_device *dev)
 start:
         rtl8192_pci_resetdescring(dev);
 	priv->Rf_Mode = RF_OP_By_SW_3wire;
-#ifdef RTL8192E
         if (priv->ResetProgress == RESET_TYPE_NORESET)
         {
             write_nic_byte(dev, ANAPAR, 0x37);
             mdelay(500);
         }
-#endif
 	priv->pFirmware->firmware_status = FW_STATUS_0_INIT;
 
 	if (priv->RegRfOff == true)
@@ -815,7 +807,6 @@ bool rtl8192_adapter_start(struct net_device *dev)
 
 	write_nic_dword(dev, CPU_GEN, ulRegRead);
 
-#ifdef RTL8192E
 
 	ICVersion = read_nic_byte(dev, IC_VERRSION);
 	if (ICVersion >= 0x4)
@@ -828,7 +819,6 @@ bool rtl8192_adapter_start(struct net_device *dev)
 			write_nic_byte(dev, SWREGULATOR, 0xb8);
 		}
 	}
-#endif
 	RT_TRACE(COMP_INIT, "BB Config Start!\n");
 	rtStatus = rtl8192_BBConfig(dev);
 	if (rtStatus != true)
@@ -967,9 +957,7 @@ bool rtl8192_adapter_start(struct net_device *dev)
 	rtl8192_setBBreg(dev, rFPGA0_RFMOD, bCCKEn, 0x1);
 	rtl8192_setBBreg(dev, rFPGA0_RFMOD, bOFDMEn, 0x1);
 
-#ifdef RTL8192E
 	write_nic_byte(dev, 0x87, 0x0);
-#endif
 
 	if (priv->RegRfOff == true) {
 		RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for RegRfOff ----------\n",__func__);
@@ -2057,9 +2045,7 @@ void rtl8192_halt_adapter(struct net_device *dev, bool reset)
 	{
 		mdelay(150);
 
-#ifdef RTL8192E
-			priv->bHwRfOffAction = 2;
-#endif
+		priv->bHwRfOffAction = 2;
 
 		if (!priv->rtllib->bSupportRemoteWakeUp)
 		{

diff --git a/drivers/staging/rtl8192e/r8192E_hw.h b/drivers/staging/rtl8192e/r8192E_hw.h
@@ -70,13 +70,11 @@ typedef enum _BaseBand_Config_Type {
 #define EEPROM_Default_TxPower			0x1010
 #define EEPROM_ICVersion_ChannelPlan	0x7C
 #define EEPROM_Customer_ID			0x7B
-#ifdef RTL8192E
 #define EEPROM_RFInd_PowerDiff			0x28
 #define EEPROM_ThermalMeter			0x29
 #define EEPROM_TxPwDiff_CrystalCap		0x2A
 #define EEPROM_TxPwIndex_CCK			0x2C
 #define EEPROM_TxPwIndex_OFDM_24G	0x3A
-#endif
 #define EEPROM_Default_TxPowerLevel		0x10
 #define EEPROM_IC_VER				0x7d
 #define EEPROM_CRC				0x7e

diff --git a/drivers/staging/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/r8192E_phy.c
@@ -27,9 +27,7 @@
 #include "dot11d.h"
 #endif
 
-#ifdef RTL8192E
 #include "r8192E_hwimg.h"
-#endif
 
 static u32 RF_CHANNEL_TABLE_ZEBRA[] = {
 	0,
@@ -67,7 +65,6 @@ u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath)
 {
 	u8 ret = 1;
 	struct r8192_priv *priv = rtllib_priv(dev);
-	#ifdef RTL8192E
 	if (priv->rf_type == RF_2T4R)
 		ret = 0;
 	else if (priv->rf_type == RF_1T2R)
@@ -77,7 +74,6 @@ u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath)
 		else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D)
 			ret = 0;
 	}
-	#endif
 	return ret;
 }
 void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData)
@@ -115,9 +111,7 @@ u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath,
 
 	if (priv->rf_chip == RF_8256)
 	{
-	#ifdef RTL8192E
 		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
-	#endif
 		if (Offset >= 31)
 		{
 			priv->RfReg0Value[eRFPath] |= 0x140;
@@ -160,9 +154,7 @@ u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eRFPath,
 			bMaskDWord,
 			(priv->RfReg0Value[eRFPath] << 16));
 
-	#ifdef RTL8192E
 		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
-	#endif
 	}
 
 
@@ -179,10 +171,7 @@ void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath
 	Offset &= 0x3f;
 	if (priv->rf_chip == RF_8256)
 	{
-
-	#ifdef RTL8192E
 		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
-	#endif
 
 		if (Offset >= 31)
 		{
@@ -225,9 +214,7 @@ void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E eRFPath
 				bMaskDWord,
 				(priv->RfReg0Value[eRFPath] << 16));
 		}
-	#ifdef RTL8192E
 		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
-	#endif
 	}
 
 	return;
@@ -240,10 +227,8 @@ void rtl8192_phy_SetRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u32
 
 	if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
 		return;
-#ifdef RTL8192E
 	if (priv->rtllib->eRFPowerState != eRfOn && !priv->being_init_adapter)
 		return;
-#endif
 
 	RT_TRACE(COMP_PHY, "FW RF CTRL is not ready now\n");
 	if (priv->Rf_Mode == RF_OP_By_FW)
@@ -281,10 +266,8 @@ u32 rtl8192_phy_QueryRFReg(struct net_device* dev, RF90_RADIO_PATH_E eRFPath, u3
 	struct r8192_priv *priv = rtllib_priv(dev);
 	if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
 		return 0;
-#ifdef RTL8192E
 	if (priv->rtllib->eRFPowerState != eRfOn && !priv->being_init_adapter)
 		return	0;
-#endif
 	down(&priv->rf_sem);
 	if (priv->Rf_Mode == RF_OP_By_FW)
 	{
@@ -655,11 +638,8 @@ bool rtl8192_BB_Config_ParaFile(struct net_device* dev)
 			(bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue);
 
 
-	#ifdef RTL8192E
 		dwRegValue = priv->CrystalCap;
 		rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap92x, dwRegValue);
-	#endif
-
 	}
 
 	return rtStatus;
@@ -675,7 +655,6 @@ bool rtl8192_BBConfig(struct net_device* dev)
 void rtl8192_phy_getTxPower(struct net_device* dev)
 {
 	struct r8192_priv *priv = rtllib_priv(dev);
-	#ifdef RTL8192E
 	priv->MCSTxPowerLevelOriginalOffset[0] =
 		read_nic_dword(dev, rTxAGC_Rate18_06);
 	priv->MCSTxPowerLevelOriginalOffset[1] =
@@ -688,7 +667,6 @@ void rtl8192_phy_getTxPower(struct net_device* dev)
 		read_nic_dword(dev, rTxAGC_Mcs11_Mcs08);
 	priv->MCSTxPowerLevelOriginalOffset[5] =
 		read_nic_dword(dev, rTxAGC_Mcs15_Mcs12);
-	#endif
 
 	priv->DefaultInitialGain[0] = read_nic_byte(dev, rOFDM0_XAAGCCore1);
 	priv->DefaultInitialGain[1] = read_nic_byte(dev, rOFDM0_XBAGCCore1);
@@ -1208,9 +1186,7 @@ static void CCK_Tx_Power_Track_BW_Switch_ThermalMeter(struct net_device *dev)
 
 static void CCK_Tx_Power_Track_BW_Switch(struct net_device *dev)
 {
-#ifdef RTL8192E
 	struct r8192_priv *priv = rtllib_priv(dev);
-#endif
 
 	if (priv->IC_Cut >= IC_VersionCut_D)
 		CCK_Tx_Power_Track_BW_Switch_TSSI(dev);
@@ -1271,9 +1247,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev)
 			else
 				CCK_Tx_Power_Track_BW_Switch(dev);
 
-	#ifdef RTL8192E
 			rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1);
-	#endif
 
 			break;
 		case HT_CHANNEL_WIDTH_20_40:
@@ -1293,9 +1267,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev)
 			rtl8192_setBBreg(dev, rOFDM1_LSTF, 0xC00, priv->nCur40MhzPrimeSC);
 
 
-	#ifdef RTL8192E
 			rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0);
-	#endif
 			break;
 		default:
 			RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n" ,priv->CurrentChannelBW);
@@ -1427,7 +1399,6 @@ void InitialGain819xPci(struct net_device *dev, u8 Operation)
 	}
 }
 
-#if defined RTL8192E
 extern	void
 PHY_SetRtl8192eRfOff(struct net_device* dev	)
 {
@@ -1442,7 +1413,6 @@ PHY_SetRtl8192eRfOff(struct net_device* dev	)
 	write_nic_byte(dev, ANAPAR_FOR_8192PciE, 0x07);
 
 }
-#endif
 
 bool
 SetRFPowerState8190(
@@ -1451,9 +1421,7 @@ SetRFPowerState8190(
 	)
 {
 	struct r8192_priv *priv = rtllib_priv(dev);
-#if defined RTL8192E
 	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->rtllib->PowerSaveControl));
-#endif
 	bool bResult = true;
 	u8	i = 0, QueueID = 0;
 	struct rtl8192_tx_ring  *ring = NULL;

diff --git a/drivers/staging/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/r8192E_phy.h
@@ -25,7 +25,6 @@
 #define MAX_RFDEPENDCMD_CNT 16
 #define MAX_POSTCMD_CNT 16
 
-#ifdef RTL8192E
 #define AGCTAB_ArrayLength				AGCTAB_ArrayLengthPciE
 #define MACPHY_ArrayLength				MACPHY_ArrayLengthPciE
 #define RadioA_ArrayLength				RadioA_ArrayLengthPciE
@@ -45,27 +44,26 @@
 #define Rtl819XAGCTAB_Array				Rtl8192PciEAGCTAB_Array
 #define Rtl819XPHY_REGArray				Rtl8192PciEPHY_REGArray
 #define Rtl819XPHY_REG_1T2RArray			Rtl8192PciEPHY_REG_1T2RArray
-#endif
 
 
 
-typedef enum _SwChnlCmdID{
+typedef enum _SwChnlCmdID {
 	CmdID_End,
 	CmdID_SetTxPowerLevel,
 	CmdID_BBRegWrite10,
 	CmdID_WritePortUlong,
 	CmdID_WritePortUshort,
 	CmdID_WritePortUchar,
 	CmdID_RF_WriteReg,
-}SwChnlCmdID;
+} SwChnlCmdID;
 
 /*--------------------------------Define structure--------------------------------*/
-typedef struct _SwChnlCmd{
+typedef struct _SwChnlCmd {
 	SwChnlCmdID	CmdID;
 	u32			Para1;
 	u32			Para2;
 	u32			msDelay;
-}__attribute__ ((packed)) SwChnlCmd;
+} __attribute__ ((packed)) SwChnlCmd;
 
 extern u32 rtl819XMACPHY_Array_PG[];
 extern u32 rtl819XPHY_REG_1T2RArray[];
@@ -75,13 +73,13 @@ extern u32 rtl819XRadioB_Array[];
 extern u32 rtl819XRadioC_Array[];
 extern u32 rtl819XRadioD_Array[];
 
-typedef enum _HW90_BLOCK{
+typedef enum _HW90_BLOCK {
 	HW90_BLOCK_MAC = 0,
 	HW90_BLOCK_PHY0 = 1,
 	HW90_BLOCK_PHY1 = 2,
 	HW90_BLOCK_RF = 3,
 	HW90_BLOCK_MAXIMUM = 4,
-}HW90_BLOCK_E, *PHW90_BLOCK_E;
+} HW90_BLOCK_E, *PHW90_BLOCK_E;
 
 typedef enum _RF90_RADIO_PATH{
 	RF90_PATH_A = 0,
@@ -120,10 +118,7 @@ extern void rtl8192_SwChnl_WorkItem(struct net_device *dev);
 extern void rtl8192_SetBWModeWorkItem(struct net_device *dev);
 extern void InitialGain819xPci(struct net_device *dev, u8 Operation);
 
-#if defined RTL8192E
-extern	void
-PHY_SetRtl8192eRfOff(struct net_device* dev	);
-#endif
+extern	void PHY_SetRtl8192eRfOff(struct net_device *dev);
 
 bool
 SetRFPowerState(

diff --git a/drivers/staging/rtl8192e/rtl_core.c b/drivers/staging/rtl8192e/rtl_core.c
@@ -2876,11 +2876,9 @@ int rtl8192_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 							setKey(dev, ipw->u.crypt.idx, ipw->u.crypt.idx, ieee->pairwise_key_type, (u8*)ieee->ap_mac_addr, 0, key);
 						}
 					}
-#ifdef RTL8192E
 					if ((ieee->pairwise_key_type == KEY_TYPE_CCMP) && ieee->pHTInfo->bCurrentHTSupport){
 						write_nic_byte(dev, 0x173, 1);
 					}
-#endif
 
 				}
 				else