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sky2: pci posting issues
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A couple of the reset and setup paths have possible PCI posting issues.
When setting registers, a read is necessary to force the writes to complete.

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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stephen hemminger authored and David S. Miller committed Nov 17, 2011
1 parent 1401a80 commit f9687c4
Showing 1 changed file with 3 additions and 0 deletions.
3 changes: 3 additions & 0 deletions drivers/net/ethernet/marvell/sky2.c
Original file line number Diff line number Diff line change
Expand Up @@ -869,6 +869,7 @@ static void sky2_wol_init(struct sky2_port *sky2)

/* block receiver */
sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
sky2_read32(hw, B0_CTST);
}

static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
Expand Down Expand Up @@ -2045,6 +2046,8 @@ static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)

sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);

sky2_read32(hw, B0_CTST);
}

static void sky2_hw_down(struct sky2_port *sky2)
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