---

yaml
---
r: 91191
b: refs/heads/master
c: 01eb569
h: refs/heads/master
i:
  91189: 04039f3
  91187: b5fbbf3
  91183: e6f7a40
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 69b02f6a9639af89c099d06d5f2c4c66a1b03ebf
+refs/heads/master: 01eb569823792ab83b2810fcb31fa38560b08951

trunk/arch/arm/mach-orion/irq.c

@@ -15,6 +15,7 @@
 #include <linux/irq.h>
 #include <asm/gpio.h>
 #include <asm/arch/orion.h>
+#include <asm/plat-orion/irq.h>
 #include "common.h"
 
 /*****************************************************************************
@@ -197,41 +198,9 @@ static void __init orion_init_gpio_irq(void)
 /*****************************************************************************
  * Orion Main IRQ
  ****************************************************************************/
-static void orion_main_irq_mask(u32 irq)
-{
-	orion_clrbits(MAIN_IRQ_MASK, 1 << irq);
-}
-
-static void orion_main_irq_unmask(u32 irq)
-{
-	orion_setbits(MAIN_IRQ_MASK, 1 << irq);
-}
-
-static struct irq_chip orion_main_irq_chip = {
-	.name		= "Orion-IRQ-Main",
-	.ack		= orion_main_irq_mask,
-	.mask		= orion_main_irq_mask,
-	.unmask		= orion_main_irq_unmask,
-};
-
 static void __init orion_init_main_irq(void)
 {
-	int i;
-
-	/*
-	 * Mask and clear Main IRQ interrupts
-	 */
-	orion_write(MAIN_IRQ_MASK, 0x0);
-	orion_write(MAIN_IRQ_CAUSE, 0x0);
-
-	/*
-	 * Register level handler for Main IRQs
-	 */
-	for (i = 0; i < IRQ_ORION_GPIO_START; i++) {
-		set_irq_chip(i, &orion_main_irq_chip);
-		set_irq_handler(i, handle_level_irq);
-		set_irq_flags(i, IRQF_VALID);
-	}
+	orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK);
 }
 
 void __init orion_init_irq(void)

trunk/arch/arm/plat-orion/Makefile

@@ -2,7 +2,7 @@
 # Makefile for the linux kernel.
 #
 
-obj-y	:=
+obj-y	:= irq.o
 obj-m	:=
 obj-n	:=
 obj-	:=

trunk/arch/arm/plat-orion/irq.c

@@ -0,0 +1,64 @@
+/*
+ * arch/arm/plat-orion/irq.c
+ *
+ * Marvell Orion SoC IRQ handling.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/plat-orion/irq.h>
+
+static void orion_irq_mask(u32 irq)
+{
+	void __iomem *maskaddr = get_irq_chip_data(irq);
+	u32 mask;
+
+	mask = readl(maskaddr);
+	mask &= ~(1 << (irq & 31));
+	writel(mask, maskaddr);
+}
+
+static void orion_irq_unmask(u32 irq)
+{
+	void __iomem *maskaddr = get_irq_chip_data(irq);
+	u32 mask;
+
+	mask = readl(maskaddr);
+	mask |= 1 << (irq & 31);
+	writel(mask, maskaddr);
+}
+
+static struct irq_chip orion_irq_chip = {
+	.name		= "orion_irq",
+	.ack		= orion_irq_mask,
+	.mask		= orion_irq_mask,
+	.unmask		= orion_irq_unmask,
+};
+
+void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
+{
+	unsigned int i;
+
+	/*
+	 * Mask all interrupts initially.
+	 */
+	writel(0, maskaddr);
+
+	/*
+	 * Register IRQ sources.
+	 */
+	for (i = 0; i < 32; i++) {
+		unsigned int irq = irq_start + i;
+
+		set_irq_chip(irq, &orion_irq_chip);
+		set_irq_chip_data(irq, maskaddr);
+		set_irq_handler(irq, handle_level_irq);
+		set_irq_flags(irq, IRQF_VALID);
+	}
+}

trunk/include/asm-arm/plat-orion/irq.h

@@ -0,0 +1,17 @@
+/*
+ * include/asm-arm/plat-orion/irq.h
+ *
+ * Marvell Orion SoC IRQ handling.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_PLAT_ORION_IRQ_H
+#define __ASM_PLAT_ORION_IRQ_H
+
+void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
+
+
+#endif