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[SCSI] qla2xxx: Use #defines instead of hardcoded values for intr sta…
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…tus.

Signed-off-by: Arun Easi <arun.easi@qlogic.com>
Signed-off-by: Chad Dupuis <chad.dupuis@qlogic.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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Arun Easi authored and James Bottomley committed Sep 24, 2012
1 parent 711aa7f commit fafbda9
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Showing 2 changed files with 29 additions and 18 deletions.
11 changes: 11 additions & 0 deletions drivers/scsi/qla2xxx/qla_def.h
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Original file line number Diff line number Diff line change
Expand Up @@ -675,6 +675,17 @@ typedef struct {
/* 83XX FCoE specific */
#define MBA_IDC_AEN 0x8200 /* FCoE: NIC Core state change AEN */

/* Interrupt type codes */
#define INTR_ROM_MB_SUCCESS 0x1
#define INTR_ROM_MB_FAILED 0x2
#define INTR_MB_SUCCESS 0x10
#define INTR_MB_FAILED 0x11
#define INTR_ASYNC_EVENT 0x12
#define INTR_RSP_QUE_UPDATE 0x13
#define INTR_RSP_QUE_UPDATE_83XX 0x14
#define INTR_ATIO_QUE_UPDATE 0x1C
#define INTR_ATIO_RSP_QUE_UPDATE 0x1D

/* ISP mailbox loopback echo diagnostic error code */
#define MBS_LB_RESET 0x17
/*
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36 changes: 18 additions & 18 deletions drivers/scsi/qla2xxx/qla_isr.c
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Original file line number Diff line number Diff line change
Expand Up @@ -2522,29 +2522,29 @@ qla24xx_intr_handler(int irq, void *dev_id)
break;

switch (stat & 0xff) {
case 0x1:
case 0x2:
case 0x10:
case 0x11:
case INTR_ROM_MB_SUCCESS:
case INTR_ROM_MB_FAILED:
case INTR_MB_SUCCESS:
case INTR_MB_FAILED:
qla24xx_mbx_completion(vha, MSW(stat));
status |= MBX_INTERRUPT;

break;
case 0x12:
case INTR_ASYNC_EVENT:
mb[0] = MSW(stat);
mb[1] = RD_REG_WORD(&reg->mailbox1);
mb[2] = RD_REG_WORD(&reg->mailbox2);
mb[3] = RD_REG_WORD(&reg->mailbox3);
qla2x00_async_event(vha, rsp, mb);
break;
case 0x13:
case 0x14:
case INTR_RSP_QUE_UPDATE:
case INTR_RSP_QUE_UPDATE_83XX:
qla24xx_process_response_queue(vha, rsp);
break;
case 0x1C: /* ATIO queue updated */
case INTR_ATIO_QUE_UPDATE:
qlt_24xx_process_atio_queue(vha);
break;
case 0x1D: /* ATIO and response queues updated */
case INTR_ATIO_RSP_QUE_UPDATE:
qlt_24xx_process_atio_queue(vha);
qla24xx_process_response_queue(vha, rsp);
break;
Expand Down Expand Up @@ -2673,29 +2673,29 @@ qla24xx_msix_default(int irq, void *dev_id)
break;

switch (stat & 0xff) {
case 0x1:
case 0x2:
case 0x10:
case 0x11:
case INTR_ROM_MB_SUCCESS:
case INTR_ROM_MB_FAILED:
case INTR_MB_SUCCESS:
case INTR_MB_FAILED:
qla24xx_mbx_completion(vha, MSW(stat));
status |= MBX_INTERRUPT;

break;
case 0x12:
case INTR_ASYNC_EVENT:
mb[0] = MSW(stat);
mb[1] = RD_REG_WORD(&reg->mailbox1);
mb[2] = RD_REG_WORD(&reg->mailbox2);
mb[3] = RD_REG_WORD(&reg->mailbox3);
qla2x00_async_event(vha, rsp, mb);
break;
case 0x13:
case 0x14:
case INTR_RSP_QUE_UPDATE:
case INTR_RSP_QUE_UPDATE_83XX:
qla24xx_process_response_queue(vha, rsp);
break;
case 0x1C: /* ATIO queue updated */
case INTR_ATIO_QUE_UPDATE:
qlt_24xx_process_atio_queue(vha);
break;
case 0x1D: /* ATIO and response queues updated */
case INTR_ATIO_RSP_QUE_UPDATE:
qlt_24xx_process_atio_queue(vha);
qla24xx_process_response_queue(vha, rsp);
break;
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