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yaml
---
r: 342709
b: refs/heads/master
c: 4ed8c9b
h: refs/heads/master
i:
  342707: 1cab8f3
v: v3
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Daniel Mack authored and Mark Brown committed Oct 15, 2012
1 parent e5f4729 commit fb51ae2
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Showing 2 changed files with 32 additions and 2 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 393a53cbcfab404d516544cd30650c7b104cd3d4
refs/heads/master: 4ed8c9b737b61030d7b6ac71294d698de85b5b7e
32 changes: 31 additions & 1 deletion trunk/sound/soc/davinci/davinci-mcasp.c
Original file line number Diff line number Diff line change
Expand Up @@ -199,6 +199,7 @@
#define ACLKXE BIT(5)
#define TX_ASYNC BIT(6)
#define ACLKXPOL BIT(7)
#define ACLKXDIV_MASK 0x1f

/*
* DAVINCI_MCASP_ACLKRCTL_REG Receive Clock Control Register Bits
Expand All @@ -207,6 +208,7 @@
#define ACLKRE BIT(5)
#define RX_ASYNC BIT(6)
#define ACLKRPOL BIT(7)
#define ACLKRDIV_MASK 0x1f

/*
* DAVINCI_MCASP_AHCLKXCTL_REG - High Frequency Transmit Clock Control
Expand All @@ -215,6 +217,7 @@
#define AHCLKXDIV(val) (val)
#define AHCLKXPOL BIT(14)
#define AHCLKXE BIT(15)
#define AHCLKXDIV_MASK 0xfff

/*
* DAVINCI_MCASP_AHCLKRCTL_REG - High Frequency Receive Clock Control
Expand All @@ -223,6 +226,7 @@
#define AHCLKRDIV(val) (val)
#define AHCLKRPOL BIT(14)
#define AHCLKRE BIT(15)
#define AHCLKRDIV_MASK 0xfff

/*
* DAVINCI_MCASP_XRSRCTL_BASE_REG - Serializer Control Register Bits
Expand Down Expand Up @@ -554,6 +558,32 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
return 0;
}

static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
{
struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai);

switch (div_id) {
case 0: /* MCLK divider */
mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKXCTL_REG,
AHCLKXDIV(div - 1), AHCLKXDIV_MASK);
mcasp_mod_bits(dev->base + DAVINCI_MCASP_AHCLKRCTL_REG,
AHCLKRDIV(div - 1), AHCLKRDIV_MASK);
break;

case 1: /* BCLK divider */
mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG,
ACLKXDIV(div - 1), ACLKXDIV_MASK);
mcasp_mod_bits(dev->base + DAVINCI_MCASP_ACLKRCTL_REG,
ACLKRDIV(div - 1), ACLKRDIV_MASK);
break;

default:
return -EINVAL;
}

return 0;
}

static int davinci_config_channel_size(struct davinci_audio_dev *dev,
int channel_size)
{
Expand Down Expand Up @@ -880,7 +910,7 @@ static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = {
.trigger = davinci_mcasp_trigger,
.hw_params = davinci_mcasp_hw_params,
.set_fmt = davinci_mcasp_set_dai_fmt,

.set_clkdiv = davinci_mcasp_set_clkdiv,
};

#define DAVINCI_MCASP_PCM_FMTS (SNDRV_PCM_FMTBIT_S8 | \
Expand Down

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