---

yaml
---
r: 296081
b: refs/heads/master
c: 229c7b2
h: refs/heads/master
i:
  296079: faabb8b
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e53b7d87cc375fbe428551651094fb676764aae3
+refs/heads/master: 229c7b22a24b9996e3a3eb1a2748e255e16bc323

trunk/arch/arm/mach-tegra/include/mach/uncompress.h

@@ -2,10 +2,12 @@
  * arch/arm/mach-tegra/include/mach/uncompress.h
  *
  * Copyright (C) 2010 Google, Inc.
+ * Copyright (C) 2011 Google, Inc.
  *
  * Author:
  *	Colin Cross <ccross@google.com>
  *	Erik Gilling <konkers@google.com>
+ *	Doug Anderson <dianders@chromium.org>
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -26,17 +28,18 @@
 
 #include <mach/iomap.h>
 
+#define DEBUG_UART_SHIFT 2
+
 static void putc(int c)
 {
 	volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
-	int shift = 2;
 
 	if (uart == NULL)
 		return;
 
-	while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
+	while (!(uart[UART_LSR << DEBUG_UART_SHIFT] & UART_LSR_THRE))
 		barrier();
-	uart[UART_TX << shift] = c;
+	uart[UART_TX << DEBUG_UART_SHIFT] = c;
 }
 
 static inline void flush(void)
@@ -48,7 +51,6 @@ static inline void arch_decomp_setup(void)
 	volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE;
 	u32 chip, div;
 	volatile u8 *uart = (volatile u8 *)TEGRA_DEBUG_UART_BASE;
-	int shift = 2;
 
 	if (uart == NULL)
 		return;
@@ -59,10 +61,10 @@ static inline void arch_decomp_setup(void)
 	else
 		div = 0x00dd;
 
-	uart[UART_LCR << shift] |= UART_LCR_DLAB;
-	uart[UART_DLL << shift] = div & 0xff;
-	uart[UART_DLM << shift] = div >> 8;
-	uart[UART_LCR << shift] = 3;
+	uart[UART_LCR << DEBUG_UART_SHIFT] |= UART_LCR_DLAB;
+	uart[UART_DLL << DEBUG_UART_SHIFT] = div & 0xff;
+	uart[UART_DLM << DEBUG_UART_SHIFT] = div >> 8;
+	uart[UART_LCR << DEBUG_UART_SHIFT] = 3;
 }
 
 static inline void arch_decomp_wdog(void)