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[POWERPC] 4xx: Add AMCC 440EP Yosemite DTS
This adds a DTS file for the AMCC 440EP Yosemite board. Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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Mar 26, 2008
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/* | ||
* Device Tree Source for AMCC Yosemite | ||
* | ||
* Copyright 2008 IBM Corp. | ||
* Josh Boyer <jwboyer@linux.vnet.ibm.com> | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without | ||
* any warranty of any kind, whether express or implied. | ||
*/ | ||
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/ { | ||
#address-cells = <2>; | ||
#size-cells = <1>; | ||
model = "amcc,yosemite"; | ||
compatible = "amcc,yosemite","amcc,bamboo"; | ||
dcr-parent = <&/cpus/cpu@0>; | ||
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aliases { | ||
ethernet0 = &EMAC0; | ||
ethernet1 = &EMAC1; | ||
serial0 = &UART0; | ||
serial1 = &UART1; | ||
serial2 = &UART2; | ||
serial3 = &UART3; | ||
}; | ||
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cpus { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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cpu@0 { | ||
device_type = "cpu"; | ||
model = "PowerPC,440EP"; | ||
reg = <0>; | ||
clock-frequency = <0>; /* Filled in by zImage */ | ||
timebase-frequency = <0>; /* Filled in by zImage */ | ||
i-cache-line-size = <20>; | ||
d-cache-line-size = <20>; | ||
i-cache-size = <8000>; | ||
d-cache-size = <8000>; | ||
dcr-controller; | ||
dcr-access-method = "native"; | ||
}; | ||
}; | ||
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memory { | ||
device_type = "memory"; | ||
reg = <0 0 0>; /* Filled in by zImage */ | ||
}; | ||
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UIC0: interrupt-controller0 { | ||
compatible = "ibm,uic-440ep","ibm,uic"; | ||
interrupt-controller; | ||
cell-index = <0>; | ||
dcr-reg = <0c0 009>; | ||
#address-cells = <0>; | ||
#size-cells = <0>; | ||
#interrupt-cells = <2>; | ||
}; | ||
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UIC1: interrupt-controller1 { | ||
compatible = "ibm,uic-440ep","ibm,uic"; | ||
interrupt-controller; | ||
cell-index = <1>; | ||
dcr-reg = <0d0 009>; | ||
#address-cells = <0>; | ||
#size-cells = <0>; | ||
#interrupt-cells = <2>; | ||
interrupts = <1e 4 1f 4>; /* cascade */ | ||
interrupt-parent = <&UIC0>; | ||
}; | ||
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SDR0: sdr { | ||
compatible = "ibm,sdr-440ep"; | ||
dcr-reg = <00e 002>; | ||
}; | ||
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CPR0: cpr { | ||
compatible = "ibm,cpr-440ep"; | ||
dcr-reg = <00c 002>; | ||
}; | ||
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plb { | ||
compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; | ||
#address-cells = <2>; | ||
#size-cells = <1>; | ||
ranges; | ||
clock-frequency = <0>; /* Filled in by zImage */ | ||
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SDRAM0: sdram { | ||
compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | ||
dcr-reg = <010 2>; | ||
}; | ||
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DMA0: dma { | ||
compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | ||
dcr-reg = <100 027>; | ||
}; | ||
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MAL0: mcmal { | ||
compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | ||
dcr-reg = <180 62>; | ||
num-tx-chans = <4>; | ||
num-rx-chans = <2>; | ||
interrupt-parent = <&MAL0>; | ||
interrupts = <0 1 2 3 4>; | ||
#interrupt-cells = <1>; | ||
#address-cells = <0>; | ||
#size-cells = <0>; | ||
interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | ||
/*RXEOB*/ 1 &UIC0 b 4 | ||
/*SERR*/ 2 &UIC1 0 4 | ||
/*TXDE*/ 3 &UIC1 1 4 | ||
/*RXDE*/ 4 &UIC1 2 4>; | ||
}; | ||
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POB0: opb { | ||
compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
/* Bamboo is oddball in the 44x world and doesn't use the ERPN | ||
* bits. | ||
*/ | ||
ranges = <00000000 0 00000000 80000000 | ||
80000000 0 80000000 80000000>; | ||
interrupt-parent = <&UIC1>; | ||
interrupts = <7 4>; | ||
clock-frequency = <0>; /* Filled in by zImage */ | ||
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EBC0: ebc { | ||
compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | ||
dcr-reg = <012 2>; | ||
#address-cells = <2>; | ||
#size-cells = <1>; | ||
clock-frequency = <0>; /* Filled in by zImage */ | ||
interrupts = <5 1>; | ||
interrupt-parent = <&UIC1>; | ||
}; | ||
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UART0: serial@ef600300 { | ||
device_type = "serial"; | ||
compatible = "ns16550"; | ||
reg = <ef600300 8>; | ||
virtual-reg = <ef600300>; | ||
clock-frequency = <0>; /* Filled in by zImage */ | ||
current-speed = <1c200>; | ||
interrupt-parent = <&UIC0>; | ||
interrupts = <0 4>; | ||
}; | ||
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UART1: serial@ef600400 { | ||
device_type = "serial"; | ||
compatible = "ns16550"; | ||
reg = <ef600400 8>; | ||
virtual-reg = <ef600400>; | ||
clock-frequency = <0>; | ||
current-speed = <0>; | ||
interrupt-parent = <&UIC0>; | ||
interrupts = <1 4>; | ||
}; | ||
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UART2: serial@ef600500 { | ||
device_type = "serial"; | ||
compatible = "ns16550"; | ||
reg = <ef600500 8>; | ||
virtual-reg = <ef600500>; | ||
clock-frequency = <0>; | ||
current-speed = <0>; | ||
interrupt-parent = <&UIC0>; | ||
interrupts = <3 4>; | ||
status = "disabled"; | ||
}; | ||
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UART3: serial@ef600600 { | ||
device_type = "serial"; | ||
compatible = "ns16550"; | ||
reg = <ef600600 8>; | ||
virtual-reg = <ef600600>; | ||
clock-frequency = <0>; | ||
current-speed = <0>; | ||
interrupt-parent = <&UIC0>; | ||
interrupts = <4 4>; | ||
status = "disabled"; | ||
}; | ||
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IIC0: i2c@ef600700 { | ||
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | ||
reg = <ef600700 14>; | ||
interrupt-parent = <&UIC0>; | ||
interrupts = <2 4>; | ||
}; | ||
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IIC1: i2c@ef600800 { | ||
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | ||
reg = <ef600800 14>; | ||
interrupt-parent = <&UIC0>; | ||
interrupts = <7 4>; | ||
}; | ||
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spi@ef600900 { | ||
compatible = "amcc,spi-440ep"; | ||
reg = <ef600900 6>; | ||
interrupts = <8 4>; | ||
interrupt-parent = <&UIC0>; | ||
}; | ||
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ZMII0: emac-zmii@ef600d00 { | ||
compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | ||
reg = <ef600d00 c>; | ||
}; | ||
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EMAC0: ethernet@ef600e00 { | ||
device_type = "network"; | ||
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | ||
interrupt-parent = <&UIC1>; | ||
interrupts = <1c 4 1d 4>; | ||
reg = <ef600e00 70>; | ||
local-mac-address = [000000000000]; | ||
mal-device = <&MAL0>; | ||
mal-tx-channel = <0 1>; | ||
mal-rx-channel = <0>; | ||
cell-index = <0>; | ||
max-frame-size = <5dc>; | ||
rx-fifo-size = <1000>; | ||
tx-fifo-size = <800>; | ||
phy-mode = "rmii"; | ||
phy-map = <00000000>; | ||
zmii-device = <&ZMII0>; | ||
zmii-channel = <0>; | ||
}; | ||
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EMAC1: ethernet@ef600f00 { | ||
device_type = "network"; | ||
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | ||
interrupt-parent = <&UIC1>; | ||
interrupts = <1e 4 1f 4>; | ||
reg = <ef600f00 70>; | ||
local-mac-address = [000000000000]; | ||
mal-device = <&MAL0>; | ||
mal-tx-channel = <2 3>; | ||
mal-rx-channel = <1>; | ||
cell-index = <1>; | ||
max-frame-size = <5dc>; | ||
rx-fifo-size = <1000>; | ||
tx-fifo-size = <800>; | ||
phy-mode = "rmii"; | ||
phy-map = <00000000>; | ||
zmii-device = <&ZMII0>; | ||
zmii-channel = <1>; | ||
}; | ||
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usb@ef601000 { | ||
compatible = "ohci-be"; | ||
reg = <ef601000 80>; | ||
interrupts = <8 4 9 4>; | ||
interrupt-parent = < &UIC1 >; | ||
}; | ||
}; | ||
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PCI0: pci@ec000000 { | ||
device_type = "pci"; | ||
#interrupt-cells = <1>; | ||
#size-cells = <2>; | ||
#address-cells = <3>; | ||
compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | ||
primary; | ||
reg = <0 eec00000 8 /* Config space access */ | ||
0 eed00000 4 /* IACK */ | ||
0 eed00000 4 /* Special cycle */ | ||
0 ef400000 40>; /* Internal registers */ | ||
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/* Outbound ranges, one memory and one IO, | ||
* later cannot be changed. Chip supports a second | ||
* IO range but we don't use it for now | ||
*/ | ||
ranges = <02000000 0 a0000000 0 a0000000 0 20000000 | ||
01000000 0 00000000 0 e8000000 0 00010000>; | ||
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/* Inbound 2GB range starting at 0 */ | ||
dma-ranges = <42000000 0 0 0 0 0 80000000>; | ||
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/* Bamboo has all 4 IRQ pins tied together per slot */ | ||
interrupt-map-mask = <f800 0 0 0>; | ||
interrupt-map = < | ||
/* IDSEL 1 */ | ||
0800 0 0 0 &UIC0 1c 8 | ||
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/* IDSEL 2 */ | ||
1000 0 0 0 &UIC0 1b 8 | ||
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/* IDSEL 3 */ | ||
1800 0 0 0 &UIC0 1a 8 | ||
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/* IDSEL 4 */ | ||
2000 0 0 0 &UIC0 19 8 | ||
>; | ||
}; | ||
}; | ||
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chosen { | ||
linux,stdout-path = "/plb/opb/serial@ef600300"; | ||
}; | ||
}; |