---

yaml --- r: 13626 b: refs/heads/master c: 59d1ff3 h: refs/heads/master v: v3
git-mirror · Nov 9, 2005 · fd5a024 · fd5a024
1 parent 5fd5c74
commit fd5a024
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Showing 3 changed files with 9 additions and 6 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: be6eb9b79f99e652a0827a475c4daa02ecef221f
+refs/heads/master: 59d1ff3bfb56d9b8cf3ec864857e6a4dfd9d2dba
diff --git a/trunk/arch/arm/lib/bitops.h b/trunk/arch/arm/lib/bitops.h
@@ -34,7 +34,7 @@
 	and	r2, r0, #7
 	mov	r3, #1
 	mov	r3, r3, lsl r2
-	save_and_disable_irqs ip, r2
+	save_and_disable_irqs ip
 	ldrb	r2, [r1, r0, lsr #3]
 	\instr	r2, r2, r3
 	strb	r2, [r1, r0, lsr #3]
@@ -54,7 +54,7 @@
 	add	r1, r1, r0, lsr #3
 	and	r3, r0, #7
 	mov	r0, #1
-	save_and_disable_irqs ip, r2
+	save_and_disable_irqs ip
 	ldrb	r2, [r1]
 	tst	r2, r0, lsl r3
 	\instr	r2, r2, r0, lsl r3

diff --git a/trunk/include/asm-arm/assembler.h b/trunk/include/asm-arm/assembler.h
@@ -83,10 +83,13 @@
  * Save the current IRQ state and disable IRQs.  Note that this macro
  * assumes FIQs are enabled, and that the processor is in SVC mode.
  */
-	.macro	save_and_disable_irqs, oldcpsr, temp
+	.macro	save_and_disable_irqs, oldcpsr
 	mrs	\oldcpsr, cpsr
-	mov	\temp, #PSR_I_BIT | MODE_SVC
-	msr	cpsr_c, \temp
+#if __LINUX_ARM_ARCH__ >= 6
+	cpsid	i
+#else
+	msr	cpsr_c, #PSR_I_BIT | MODE_SVC
+#endif
 	.endm
 
 /*