Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history 
yaml
---
r: 307549
b: refs/heads/master
c: 67b342e
h: refs/heads/master
i:
  307547: 4a83503
v: v3
  • Loading branch information
Ben Skeggs committed May 24, 2012
1 parent 7af5e96 commit fead6ce
Show file tree
Hide file tree
Showing 14 changed files with 63 additions and 188 deletions.
2 changes: 1 addition & 1 deletion [refs]
View file
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 906c033e276877c1374c9159976b05746af3c86d
refs/heads/master: 67b342efc761046a22b73c327837479b58613a41
12 changes: 8 additions & 4 deletions trunk/drivers/gpu/drm/nouveau/nouveau_channel.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -190,7 +190,8 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
chan->user_get_hi = 0x60;

/* disable the fifo caches */
pfifo->reassign(dev, false);
if (dev_priv->card_type < NV_C0)
nv_wr32(dev, NV03_PFIFO_CACHES, 0);

/* Construct initial RAMFC for new channel */
ret = pfifo->create_context(chan);
Expand All @@ -199,7 +200,8 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
return ret;
}

pfifo->reassign(dev, true);
if (dev_priv->card_type < NV_C0)
nv_wr32(dev, NV03_PFIFO_CACHES, 1);

/* Insert NOPs for NOUVEAU_DMA_SKIPS */
ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
Expand Down Expand Up @@ -304,7 +306,8 @@ nouveau_channel_put_unlocked(struct nouveau_channel **pchan)
nouveau_channel_idle(chan);

/* boot it off the hardware */
pfifo->reassign(dev, false);
if (dev_priv->card_type < NV_C0)
nv_wr32(dev, NV03_PFIFO_CACHES, 0);

/* destroy the engine specific contexts */
for (i = NVOBJ_ENGINE_NR - 1; i >= 0; i--) {
Expand All @@ -315,7 +318,8 @@ nouveau_channel_put_unlocked(struct nouveau_channel **pchan)
pfifo->destroy_context(chan);
}

pfifo->reassign(dev, true);
if (dev_priv->card_type < NV_C0)
nv_wr32(dev, NV03_PFIFO_CACHES, 1);

/* aside from its resources, the channel should now be dead,
* remove it from the channel list
Expand Down
15 changes: 11 additions & 4 deletions trunk/drivers/gpu/drm/nouveau/nouveau_drv.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -221,8 +221,12 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
nouveau_channel_idle(chan);
}

pfifo->reassign(dev, false);
pfifo->disable(dev);
if (dev_priv->card_type < NV_C0) {
nv_wr32(dev, NV03_PFIFO_CACHES, 0);
nv_mask(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 0x00000001, 0);
nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 0);
nv_mask(dev, NV04_PFIFO_CACHE1_PULL0, 0x00000001, 0);
}
pfifo->unload_context(dev);

for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
Expand Down Expand Up @@ -265,8 +269,11 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
if (dev_priv->eng[e])
dev_priv->eng[e]->init(dev, e);
}
pfifo->enable(dev);
pfifo->reassign(dev, true);
if (dev_priv->card_type < NV_C0) {
nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);
nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
nv_wr32(dev, NV03_PFIFO_CACHES, 1);
}
return ret;
}

Expand Down
21 changes: 1 addition & 20 deletions trunk/drivers/gpu/drm/nouveau/nouveau_drv.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -357,13 +357,6 @@ struct nouveau_fifo_engine {
int (*init)(struct drm_device *);
void (*takedown)(struct drm_device *);

void (*disable)(struct drm_device *);
void (*enable)(struct drm_device *);
bool (*reassign)(struct drm_device *, bool enable);
bool (*cache_pull)(struct drm_device *dev, bool enable);

int (*channel_id)(struct drm_device *);

int (*create_context)(struct nouveau_channel *);
void (*destroy_context)(struct nouveau_channel *);
int (*load_context)(struct nouveau_channel *);
Expand Down Expand Up @@ -1193,20 +1186,15 @@ extern void nvc0_fb_takedown(struct drm_device *);
/* nv04_fifo.c */
extern int nv04_fifo_init(struct drm_device *);
extern void nv04_fifo_fini(struct drm_device *);
extern void nv04_fifo_disable(struct drm_device *);
extern void nv04_fifo_enable(struct drm_device *);
extern bool nv04_fifo_reassign(struct drm_device *, bool);
extern bool nv04_fifo_cache_pull(struct drm_device *, bool);
extern int nv04_fifo_channel_id(struct drm_device *);
extern int nv04_fifo_create_context(struct nouveau_channel *);
extern void nv04_fifo_destroy_context(struct nouveau_channel *);
extern int nv04_fifo_load_context(struct nouveau_channel *);
extern int nv04_fifo_unload_context(struct drm_device *);
extern void nv04_fifo_isr(struct drm_device *);
bool nv04_fifo_cache_pull(struct drm_device *, bool enable);

/* nv10_fifo.c */
extern int nv10_fifo_init(struct drm_device *);
extern int nv10_fifo_channel_id(struct drm_device *);
extern int nv10_fifo_create_context(struct nouveau_channel *);
extern int nv10_fifo_load_context(struct nouveau_channel *);
extern int nv10_fifo_unload_context(struct drm_device *);
Expand All @@ -1220,7 +1208,6 @@ extern int nv40_fifo_unload_context(struct drm_device *);
/* nv50_fifo.c */
extern int nv50_fifo_init(struct drm_device *);
extern void nv50_fifo_takedown(struct drm_device *);
extern int nv50_fifo_channel_id(struct drm_device *);
extern int nv50_fifo_create_context(struct nouveau_channel *);
extern void nv50_fifo_destroy_context(struct nouveau_channel *);
extern int nv50_fifo_load_context(struct nouveau_channel *);
Expand All @@ -1230,11 +1217,6 @@ extern void nv50_fifo_tlb_flush(struct drm_device *dev);
/* nvc0_fifo.c */
extern int nvc0_fifo_init(struct drm_device *);
extern void nvc0_fifo_takedown(struct drm_device *);
extern void nvc0_fifo_disable(struct drm_device *);
extern void nvc0_fifo_enable(struct drm_device *);
extern bool nvc0_fifo_reassign(struct drm_device *, bool);
extern bool nvc0_fifo_cache_pull(struct drm_device *, bool);
extern int nvc0_fifo_channel_id(struct drm_device *);
extern int nvc0_fifo_create_context(struct nouveau_channel *);
extern void nvc0_fifo_destroy_context(struct nouveau_channel *);
extern int nvc0_fifo_load_context(struct nouveau_channel *);
Expand All @@ -1243,7 +1225,6 @@ extern int nvc0_fifo_unload_context(struct drm_device *);
/* nve0_fifo.c */
extern int nve0_fifo_init(struct drm_device *);
extern void nve0_fifo_takedown(struct drm_device *);
extern int nve0_fifo_channel_id(struct drm_device *);
extern int nve0_fifo_create_context(struct nouveau_channel *);
extern void nve0_fifo_destroy_context(struct nouveau_channel *);
extern int nve0_fifo_unload_context(struct drm_device *);
Expand Down
9 changes: 4 additions & 5 deletions trunk/drivers/gpu/drm/nouveau/nouveau_mem.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,6 @@ nv10_mem_update_tile_region(struct drm_device *dev,
uint32_t size, uint32_t pitch, uint32_t flags)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
int i = tile - dev_priv->tile.reg, j;
unsigned long save;
Expand All @@ -65,8 +64,8 @@ nv10_mem_update_tile_region(struct drm_device *dev,
pfb->init_tile_region(dev, i, addr, size, pitch, flags);

spin_lock_irqsave(&dev_priv->context_switch_lock, save);
pfifo->reassign(dev, false);
pfifo->cache_pull(dev, false);
nv_wr32(dev, NV03_PFIFO_CACHES, 0);
nv04_fifo_cache_pull(dev, false);

nouveau_wait_for_idle(dev);

Expand All @@ -76,8 +75,8 @@ nv10_mem_update_tile_region(struct drm_device *dev,
dev_priv->eng[j]->set_tile_region(dev, i);
}

pfifo->cache_pull(dev, true);
pfifo->reassign(dev, true);
nv04_fifo_cache_pull(dev, true);
nv_wr32(dev, NV03_PFIFO_CACHES, 1);
spin_unlock_irqrestore(&dev_priv->context_switch_lock, save);
}

Expand Down
41 changes: 0 additions & 41 deletions trunk/drivers/gpu/drm/nouveau/nouveau_state.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -71,11 +71,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 16;
engine->fifo.init = nv04_fifo_init;
engine->fifo.takedown = nv04_fifo_fini;
engine->fifo.disable = nv04_fifo_disable;
engine->fifo.enable = nv04_fifo_enable;
engine->fifo.reassign = nv04_fifo_reassign;
engine->fifo.cache_pull = nv04_fifo_cache_pull;
engine->fifo.channel_id = nv04_fifo_channel_id;
engine->fifo.create_context = nv04_fifo_create_context;
engine->fifo.destroy_context = nv04_fifo_destroy_context;
engine->fifo.load_context = nv04_fifo_load_context;
Expand Down Expand Up @@ -116,11 +111,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 32;
engine->fifo.init = nv10_fifo_init;
engine->fifo.takedown = nv04_fifo_fini;
engine->fifo.disable = nv04_fifo_disable;
engine->fifo.enable = nv04_fifo_enable;
engine->fifo.reassign = nv04_fifo_reassign;
engine->fifo.cache_pull = nv04_fifo_cache_pull;
engine->fifo.channel_id = nv10_fifo_channel_id;
engine->fifo.create_context = nv10_fifo_create_context;
engine->fifo.destroy_context = nv04_fifo_destroy_context;
engine->fifo.load_context = nv10_fifo_load_context;
Expand Down Expand Up @@ -167,11 +157,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 32;
engine->fifo.init = nv10_fifo_init;
engine->fifo.takedown = nv04_fifo_fini;
engine->fifo.disable = nv04_fifo_disable;
engine->fifo.enable = nv04_fifo_enable;
engine->fifo.reassign = nv04_fifo_reassign;
engine->fifo.cache_pull = nv04_fifo_cache_pull;
engine->fifo.channel_id = nv10_fifo_channel_id;
engine->fifo.create_context = nv10_fifo_create_context;
engine->fifo.destroy_context = nv04_fifo_destroy_context;
engine->fifo.load_context = nv10_fifo_load_context;
Expand Down Expand Up @@ -214,11 +199,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 32;
engine->fifo.init = nv10_fifo_init;
engine->fifo.takedown = nv04_fifo_fini;
engine->fifo.disable = nv04_fifo_disable;
engine->fifo.enable = nv04_fifo_enable;
engine->fifo.reassign = nv04_fifo_reassign;
engine->fifo.cache_pull = nv04_fifo_cache_pull;
engine->fifo.channel_id = nv10_fifo_channel_id;
engine->fifo.create_context = nv10_fifo_create_context;
engine->fifo.destroy_context = nv04_fifo_destroy_context;
engine->fifo.load_context = nv10_fifo_load_context;
Expand Down Expand Up @@ -264,11 +244,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 32;
engine->fifo.init = nv40_fifo_init;
engine->fifo.takedown = nv04_fifo_fini;
engine->fifo.disable = nv04_fifo_disable;
engine->fifo.enable = nv04_fifo_enable;
engine->fifo.reassign = nv04_fifo_reassign;
engine->fifo.cache_pull = nv04_fifo_cache_pull;
engine->fifo.channel_id = nv10_fifo_channel_id;
engine->fifo.create_context = nv40_fifo_create_context;
engine->fifo.destroy_context = nv04_fifo_destroy_context;
engine->fifo.load_context = nv40_fifo_load_context;
Expand Down Expand Up @@ -322,10 +297,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 128;
engine->fifo.init = nv50_fifo_init;
engine->fifo.takedown = nv50_fifo_takedown;
engine->fifo.disable = nv04_fifo_disable;
engine->fifo.enable = nv04_fifo_enable;
engine->fifo.reassign = nv04_fifo_reassign;
engine->fifo.channel_id = nv50_fifo_channel_id;
engine->fifo.create_context = nv50_fifo_create_context;
engine->fifo.destroy_context = nv50_fifo_destroy_context;
engine->fifo.load_context = nv50_fifo_load_context;
Expand Down Expand Up @@ -397,10 +368,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 128;
engine->fifo.init = nvc0_fifo_init;
engine->fifo.takedown = nvc0_fifo_takedown;
engine->fifo.disable = nvc0_fifo_disable;
engine->fifo.enable = nvc0_fifo_enable;
engine->fifo.reassign = nvc0_fifo_reassign;
engine->fifo.channel_id = nvc0_fifo_channel_id;
engine->fifo.create_context = nvc0_fifo_create_context;
engine->fifo.destroy_context = nvc0_fifo_destroy_context;
engine->fifo.load_context = nvc0_fifo_load_context;
Expand Down Expand Up @@ -450,10 +417,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 128;
engine->fifo.init = nvc0_fifo_init;
engine->fifo.takedown = nvc0_fifo_takedown;
engine->fifo.disable = nvc0_fifo_disable;
engine->fifo.enable = nvc0_fifo_enable;
engine->fifo.reassign = nvc0_fifo_reassign;
engine->fifo.channel_id = nvc0_fifo_channel_id;
engine->fifo.create_context = nvc0_fifo_create_context;
engine->fifo.destroy_context = nvc0_fifo_destroy_context;
engine->fifo.load_context = nvc0_fifo_load_context;
Expand Down Expand Up @@ -501,10 +464,6 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->fifo.channels = 4096;
engine->fifo.init = nve0_fifo_init;
engine->fifo.takedown = nve0_fifo_takedown;
engine->fifo.disable = nvc0_fifo_disable;
engine->fifo.enable = nvc0_fifo_enable;
engine->fifo.reassign = nvc0_fifo_reassign;
engine->fifo.channel_id = nve0_fifo_channel_id;
engine->fifo.create_context = nve0_fifo_create_context;
engine->fifo.destroy_context = nve0_fifo_destroy_context;
engine->fifo.load_context = nvc0_fifo_load_context;
Expand Down
60 changes: 14 additions & 46 deletions trunk/drivers/gpu/drm/nouveau/nv04_fifo.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -43,34 +43,6 @@
#define RAMFC_WR(offset, val) nv_wo32(chan->ramfc, NV04_RAMFC_##offset, (val))
#define RAMFC_RD(offset) nv_ro32(chan->ramfc, NV04_RAMFC_##offset)

void
nv04_fifo_disable(struct drm_device *dev)
{
uint32_t tmp;

tmp = nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUSH);
nv_wr32(dev, NV04_PFIFO_CACHE1_DMA_PUSH, tmp & ~1);
nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 0);
tmp = nv_rd32(dev, NV03_PFIFO_CACHE1_PULL1);
nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, tmp & ~1);
}

void
nv04_fifo_enable(struct drm_device *dev)
{
nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);
nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
}

bool
nv04_fifo_reassign(struct drm_device *dev, bool enable)
{
uint32_t reassign = nv_rd32(dev, NV03_PFIFO_CACHES);

nv_wr32(dev, NV03_PFIFO_CACHES, enable ? 1 : 0);
return (reassign == 1);
}

bool
nv04_fifo_cache_pull(struct drm_device *dev, bool enable)
{
Expand Down Expand Up @@ -100,13 +72,6 @@ nv04_fifo_cache_pull(struct drm_device *dev, bool enable)
return pull & 1;
}

int
nv04_fifo_channel_id(struct drm_device *dev)
{
return nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &
NV03_PFIFO_CACHE1_PUSH1_CHID_MASK;
}

#ifdef __BIG_ENDIAN
#define DMA_FETCH_ENDIANNESS NV_PFIFO_CACHE1_BIG_ENDIAN
#else
Expand Down Expand Up @@ -162,19 +127,21 @@ nv04_fifo_destroy_context(struct nouveau_channel *chan)
unsigned long flags;

spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
pfifo->reassign(dev, false);
nv_wr32(dev, NV03_PFIFO_CACHES, 0);

/* Unload the context if it's the currently active one */
if (pfifo->channel_id(dev) == chan->id) {
pfifo->disable(dev);
if ((nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) & 0xf) == chan->id) {
nv_mask(dev, NV04_PFIFO_CACHE1_DMA_PUSH, 0x00000001, 0);
nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 0);
nv_mask(dev, NV04_PFIFO_CACHE1_PULL0, 0x00000001, 0);
pfifo->unload_context(dev);
pfifo->enable(dev);
nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);
nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
}

/* Keep it from being rescheduled */
nv_mask(dev, NV04_PFIFO_MODE, 1 << chan->id, 0);

pfifo->reassign(dev, true);
nv_wr32(dev, NV03_PFIFO_CACHES, 1);
spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);

/* Free the channel resources */
Expand Down Expand Up @@ -231,7 +198,7 @@ nv04_fifo_unload_context(struct drm_device *dev)
uint32_t tmp;
int chid;

chid = pfifo->channel_id(dev);
chid = nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) & 0xf;
if (chid < 0 || chid >= dev_priv->engine.fifo.channels)
return 0;

Expand Down Expand Up @@ -313,8 +280,9 @@ nv04_fifo_init(struct drm_device *dev)
nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, pfifo->channels - 1);

nv04_fifo_init_intr(dev);
pfifo->enable(dev);
pfifo->reassign(dev, true);
nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH0, 1);
nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
nv_wr32(dev, NV03_PFIFO_CACHES, 1);

for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
if (dev_priv->channels.ptr[i]) {
Expand Down Expand Up @@ -392,7 +360,6 @@ void
nv04_fifo_isr(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_engine *engine = &dev_priv->engine;
uint32_t status, reassign;
int cnt = 0;

Expand All @@ -402,7 +369,8 @@ nv04_fifo_isr(struct drm_device *dev)

nv_wr32(dev, NV03_PFIFO_CACHES, 0);

chid = engine->fifo.channel_id(dev);
chid = nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1);
chid &= dev_priv->engine.fifo.channels - 1;
get = nv_rd32(dev, NV03_PFIFO_CACHE1_GET);

if (status & NV_PFIFO_INTR_CACHE_ERROR) {
Expand Down
3 changes: 2 additions & 1 deletion trunk/drivers/gpu/drm/nouveau/nv04_graph.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -998,7 +998,8 @@ nv04_graph_context_switch(struct drm_device *dev)
nv04_graph_unload_context(dev);

/* Load context for next channel */
chid = dev_priv->engine.fifo.channel_id(dev);
chid = nv_rd32(dev, NV03_PFIFO_CACHE1_PUSH1) &
NV03_PFIFO_CACHE1_PUSH1_CHID_MASK;
chan = dev_priv->channels.ptr[chid];
if (chan)
nv04_graph_load_context(chan);
Expand Down
Loading

0 comments on commit fead6ce

Please sign in to comment.