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llvm: Update version from 7.0.1 to 8.0.0
[Release notes][1]: > ## Non-comprehensive list of changes in this release > > * The llvm-cov tool can now export lcov trace files using the -format=lcov option of the export command. > * The add_llvm_loadable_module CMake macro has been removed. The add_llvm_library macro with the MODULE argument now provides the same functionality. See Writing an LLVM Pass. > * For MinGW, references to data variables that might need to be imported from a dll are accessed via a stub, to allow the linker to convert it to a dllimport if needed. > * Added support for labels as offsets in .reloc directive. > * Support for precise identification of X86 instructions with memory operands, by using debug information. This supports profile-driven cache prefetching. It is enabled with the -x86-discriminate-memops LLVM Flag. > * Support for profile-driven software cache prefetching on X86. This is part of a larger system, consisting of: an offline cache prefetches recommender, AutoFDO tooling, and LLVM. In this system, a binary compiled with -x86-discriminate-memops is run under the observation of the recommender. The recommender identifies certain memory access instructions by their binary file address, and recommends a prefetch of a specific type (NTA, T0, etc) be performed at a specified fixed offset from such an instruction’s memory operand. Next, this information needs to be converted to the AutoFDO syntax and the resulting profile may be passed back to the compiler with the LLVM flag -prefetch-hints-file, together with the exact same set of compilation parameters used for the original binary. More information is available in the RFC. > * Windows support for libFuzzer (x86_64). > > […] > > ### Changes to the X86 Target > > * Machine model for AMD bdver2 (Piledriver) CPU was added. It is used to support instruction scheduling and other instruction cost heuristics. > * New AVX512F gather and scatter intrinsics were added that take a <X x i1> mask instead of a scalar integer. This removes the need for a bitcast in IR. The new intrinsics are named like the old intrinsics with llvm.avx512. replaced with llvm.avx512.mask.. The old intrinsics will be removed in a future release. > * Added cascadelake as a CPU name for -march. This is skylake-avx512 with the addition of the avx512vnni instruction set. > * ADCX instruction will no longer be emitted. This instruction is rarely better than the legacy ADC instruction and just increased code size. [1]: https://releases.llvm.org/8.0.0/docs/ReleaseNotes.html
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