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Merge tag 'qcom-dt-for-3.18' of git://git.kernel.org/pub/scm/linux/ke…
…rnel/git/galak/linux-qcom into next/dt Merge "qcom DT changes for v3.18" from Kumar Gala: Qualcomm ARM Based Device Tree Updates for v3.18 * Added APQ8084 dt support for clocks, serial, pinctrl, and IFC6540 board * Added IPQ8064 dt support for basic SoC and AP148 board * Added APQ8064 dt support for pinctrl, reset, SDHC, and multimedia clocks * Added PMIC 8058 dt support on MSM8660, enables PMIC based power key, keypad, rtc, and vibrator * Added PMIC 8921 dt support on MSM8960, enables PMIC based power key, keypad, and rtc * tag 'qcom-dt-for-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: ARM: DT: QCOM: apq8064: Add dma support for sdcc node ARM: DT: apq8064: Add sdcc support via mcci driver. ARM: dts: qcom: Add 8064 multimedia clock controller node ARM: DT: APQ8064: Add node for ps_hold function in pinctrl ARM: DT: APQ8064: Add pinctrl support ARM: dts: qcom: Add TLMM DT node for APQ8084 ARM: dts: qcom: Add initial IFC6540 board device tree ARM: dts: msm: Add 8058 PMIC to ssbi bus ARM: dts: msm: Add 8921 PMIC to ssbi bus ARM: qcom: Add initial IPQ8064 SoC and AP148 device trees ARM: dts: qcom: Add APQ8084 serial port DT node ARM: dts: qcom: Add APQ8084 Global Clock Controller DT node Signed-off-by: Olof Johansson <olof@lixom.net>
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#include "qcom-apq8084.dtsi" | ||
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/ { | ||
model = "Qualcomm APQ8084/IFC6540"; | ||
compatible = "qcom,apq8084-ifc6540", "qcom,apq8084"; | ||
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soc { | ||
serial@f995e000 { | ||
status = "okay"; | ||
}; | ||
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sdhci@f9824900 { | ||
bus-width = <8>; | ||
non-removable; | ||
status = "okay"; | ||
}; | ||
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sdhci@f98a4900 { | ||
cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>; | ||
bus-width = <4>; | ||
}; | ||
}; | ||
}; |
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#include "qcom-ipq8064-v1.0.dtsi" | ||
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/ { | ||
model = "Qualcomm IPQ8064/AP148"; | ||
compatible = "qcom,ipq8064-ap148", "qcom,ipq8064"; | ||
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reserved-memory { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges; | ||
rsvd@41200000 { | ||
reg = <0x41200000 0x300000>; | ||
no-map; | ||
}; | ||
}; | ||
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soc { | ||
pinmux@800000 { | ||
i2c4_pins: i2c4_pinmux { | ||
pins = "gpio12", "gpio13"; | ||
function = "gsbi4"; | ||
bias-disable; | ||
}; | ||
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spi_pins: spi_pins { | ||
mux { | ||
pins = "gpio18", "gpio19", "gpio21"; | ||
function = "gsbi5"; | ||
drive-strength = <10>; | ||
bias-none; | ||
}; | ||
}; | ||
}; | ||
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gsbi@16300000 { | ||
qcom,mode = <GSBI_PROT_I2C_UART>; | ||
status = "ok"; | ||
serial@16340000 { | ||
status = "ok"; | ||
}; | ||
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i2c4: i2c@16380000 { | ||
status = "ok"; | ||
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clock-frequency = <200000>; | ||
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pinctrl-0 = <&i2c4_pins>; | ||
pinctrl-names = "default"; | ||
}; | ||
}; | ||
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gsbi5: gsbi@1a200000 { | ||
qcom,mode = <GSBI_PROT_SPI>; | ||
status = "ok"; | ||
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spi4: spi@1a280000 { | ||
status = "ok"; | ||
spi-max-frequency = <50000000>; | ||
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pinctrl-0 = <&spi_pins>; | ||
pinctrl-names = "default"; | ||
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cs-gpios = <&qcom_pinmux 20 0>; | ||
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flash: m25p80@0 { | ||
compatible = "s25fl256s1"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
spi-max-frequency = <50000000>; | ||
reg = <0>; | ||
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partition@0 { | ||
label = "rootfs"; | ||
reg = <0x0 0x1000000>; | ||
}; | ||
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partition@1 { | ||
label = "scratch"; | ||
reg = <0x1000000 0x1000000>; | ||
}; | ||
}; | ||
}; | ||
}; | ||
}; | ||
}; |
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#include "qcom-ipq8064.dtsi" |
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