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Merge branch 'ste-dt-for-next' of git://git.linaro.org/people/ljones/…
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…linux-3.0-ux500 into next/dt

From Lee Jones. It's an update of the previous ux500/dt branch with a few more
patches:

* 'ste-dt-for-next' of git://git.linaro.org/people/ljones/linux-3.0-ux500:
  ARM: ux500: Describe UART platform registering issues more accurately
  ARM: ux500: Enable all MMC devices on the u9540 when booting with DT
  ARM: ux500: Enable SDI4 port on the u9540 when booting with Device Tree
  ARM: ux500: Add UART support to the u9540 Device Tree
  ARM: ux500: Add skeleton DTS file for the u9540
  ARM: ux500: Add SDI (MMC) support to the HREF Device Tree
  ARM: ux500: Move regulator-name properties out to board DTS files

Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson committed Nov 21, 2012
2 parents f09771b + cece5c4 commit 02d1ea0
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Showing 3 changed files with 249 additions and 2 deletions.
176 changes: 176 additions & 0 deletions arch/arm/boot/dts/hrefv60plus.dts
Original file line number Diff line number Diff line change
Expand Up @@ -30,5 +30,181 @@
reset-gpio = <&gpio4 15 0x4>;
};
};

// External Micro SD slot
sdi0_per1@80126000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <50000000>;
bus-width = <4>;
mmc-cap-sd-highspeed;
mmc-cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux3_reg>;

cd-gpios = <&tc3589x_gpio 3 0x4>;

status = "okay";
};

// WLAN SDIO channel
sdi1_per2@80118000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <50000000>;
bus-width = <4>;

status = "okay";
};

// PoP:ed eMMC
sdi2_per3@80005000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <50000000>;
bus-width = <8>;
mmc-cap-mmc-highspeed;

status = "okay";
};

// On-board eMMC
sdi4_per2@80114000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <50000000>;
bus-width = <8>;
mmc-cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux2_reg>;

status = "okay";
};

prcmu@80157000 {
db8500-prcmu-regulators {
db8500_vape_reg: db8500_vape {
regulator-name = "db8500-vape";
};

db8500_varm_reg: db8500_varm {
regulator-name = "db8500-varm";
};

db8500_vmodem_reg: db8500_vmodem {
regulator-name = "db8500-vmodem";
};

db8500_vpll_reg: db8500_vpll {
regulator-name = "db8500-vpll";
};

db8500_vsmps1_reg: db8500_vsmps1 {
regulator-name = "db8500-vsmps1";
};

db8500_vsmps2_reg: db8500_vsmps2 {
regulator-name = "db8500-vsmps2";
};

db8500_vsmps3_reg: db8500_vsmps3 {
regulator-name = "db8500-vsmps3";
};

db8500_vrf1_reg: db8500_vrf1 {
regulator-name = "db8500-vrf1";
};

db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
regulator-name = "db8500-sva-mmdsp";
};

db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
regulator-name = "db8500-sva-mmdsp-ret";
};

db8500_sva_pipe_reg: db8500_sva_pipe {
regulator-name = "db8500_sva_pipe";
};

db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
regulator-name = "db8500_sia_mmdsp";
};

db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
regulator-name = "db8500-sia-mmdsp-ret";
};

db8500_sia_pipe_reg: db8500_sia_pipe {
regulator-name = "db8500-sia-pipe";
};

db8500_sga_reg: db8500_sga {
regulator-name = "db8500-sga";
};

db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
regulator-name = "db8500-b2r2-mcde";
};

db8500_esram12_reg: db8500_esram12 {
regulator-name = "db8500-esram12";
};

db8500_esram12_ret_reg: db8500_esram12_ret {
regulator-name = "db8500-esram12-ret";
};

db8500_esram34_reg: db8500_esram34 {
regulator-name = "db8500-esram34";
};

db8500_esram34_ret_reg: db8500_esram34_ret {
regulator-name = "db8500-esram34-ret";
};
};

ab8500@5 {
ab8500-regulators {
ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
regulator-name = "V-DISPLAY";
};

ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
regulator-name = "V-eMMC1";
};

ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
regulator-name = "V-MMC-SD";
};

ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
regulator-name = "V-INTCORE";
};

ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
regulator-name = "V-TVOUT";
};

ab8500_ldo_usb_reg: ab8500_ldo_usb {
regulator-name = "dummy";
};

ab8500_ldo_audio_reg: ab8500_ldo_audio {
regulator-name = "V-AUD";
};

ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
regulator-name = "V-AMIC1";
};

ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
regulator-name = "V-AMIC2";
};

ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
regulator-name = "V-DMIC";
};

ab8500_ldo_ana_reg: ab8500_ldo_ana {
regulator-name = "V-CSI/DSI";
};
};
};
};
};
};
72 changes: 72 additions & 0 deletions arch/arm/boot/dts/u9540.dts
Original file line number Diff line number Diff line change
@@ -0,0 +1,72 @@
/*
* Copyright 2012 ST-Ericsson AB
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/

/dts-v1/;
/include/ "dbx5x0.dtsi"

/ {
model = "ST-Ericsson U9540 platform with Device Tree";
compatible = "st-ericsson,u9540";

memory {
reg = <0x00000000 0x20000000>;
};

soc-u9500 {
uart@80120000 {
status = "okay";
};

uart@80121000 {
status = "okay";
};

uart@80007000 {
status = "okay";
};

// External Micro SD slot
sdi0_per1@80126000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <4>;
mmc-cap-sd-highspeed;
mmc-cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux3_reg>;

cd-gpios = <&gpio7 6 0x4>; // 230
cd-inverted;

status = "okay";
};


// WLAN SDIO channel
sdi1_per2@80118000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <50000000>;
bus-width = <4>;

status = "okay";
};

// On-board eMMC
sdi4_per2@80114000 {
arm,primecell-periphid = <0x10480180>;
max-frequency = <100000000>;
bus-width = <8>;
mmc-cap-mmc-highspeed;
vmmc-supply = <&ab8500_ldo_aux2_reg>;

status = "okay";
};
};
};
3 changes: 1 addition & 2 deletions arch/arm/mach-ux500/cpu-db8500.c
Original file line number Diff line number Diff line change
Expand Up @@ -262,11 +262,10 @@ static struct device * __init u8500_of_init_devices(void)
static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
/* Requires call-back bindings. */
OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
/* Requires DMA and call-back bindings. */
/* Requires DMA bindings. */
OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
/* Requires DMA bindings. */
OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
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