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clk: mediatek: Add MT8195 topckgen clock support
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Add MT8195 topckgen clock controller which provides muxes, dividers
to handle variety clock selection in other IP blocks.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Link: https://lore.kernel.org/r/20210914021633.26377-8-chun-jie.chen@mediatek.com
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Chun-Jie Chen authored and Stephen Boyd committed Sep 14, 2021
1 parent 3e9121f commit 0360be0
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Showing 2 changed files with 1,274 additions and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/clk/mediatek/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -80,6 +80,6 @@ obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk-mt8192-msdc.o
obj-$(CONFIG_COMMON_CLK_MT8192_SCP_ADSP) += clk-mt8192-scp_adsp.o
obj-$(CONFIG_COMMON_CLK_MT8192_VDECSYS) += clk-mt8192-vdec.o
obj-$(CONFIG_COMMON_CLK_MT8192_VENCSYS) += clk-mt8192-venc.o
obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o
obj-$(CONFIG_COMMON_CLK_MT8195) += clk-mt8195-apmixedsys.o clk-mt8195-topckgen.o
obj-$(CONFIG_COMMON_CLK_MT8516) += clk-mt8516.o
obj-$(CONFIG_COMMON_CLK_MT8516_AUDSYS) += clk-mt8516-aud.o
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