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clk: qcom: Add GDSC support for SDX55 GCC
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Add GDSC support to control the power supply of power domains in SDX55
GCC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201126072844.35370-7-manivannan.sadhasivam@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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Manivannan Sadhasivam authored and Stephen Boyd committed Dec 8, 2020
1 parent bdf7805 commit 063930e
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Showing 2 changed files with 34 additions and 0 deletions.
1 change: 1 addition & 0 deletions drivers/clk/qcom/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -424,6 +424,7 @@ config SDM_LPASSCC_845

config SDX_GCC_55
tristate "SDX55 Global Clock Controller"
select QCOM_GDSC
help
Support for the global clock controller on SDX55 devices.
Say Y if you want to use peripheral devices such as UART,
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33 changes: 33 additions & 0 deletions drivers/clk/qcom/gcc-sdx55.c
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@
#include "clk-pll.h"
#include "clk-rcg.h"
#include "clk-regmap.h"
#include "gdsc.h"
#include "reset.h"

enum {
Expand Down Expand Up @@ -1455,6 +1456,30 @@ static struct clk_branch gcc_xo_pcie_link_clk = {
},
};

static struct gdsc usb30_gdsc = {
.gdscr = 0x0b004,
.pd = {
.name = "usb30_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
};

static struct gdsc pcie_gdsc = {
.gdscr = 0x37004,
.pd = {
.name = "pcie_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
};

static struct gdsc emac_gdsc = {
.gdscr = 0x47004,
.pd = {
.name = "emac_gdsc",
},
.pwrsts = PWRSTS_OFF_ON,
};

static struct clk_regmap *gcc_sdx55_clocks[] = {
[GCC_AHB_PCIE_LINK_CLK] = &gcc_ahb_pcie_link_clk.clkr,
[GCC_BLSP1_AHB_CLK] = &gcc_blsp1_ahb_clk.clkr,
Expand Down Expand Up @@ -1560,6 +1585,12 @@ static const struct qcom_reset_map gcc_sdx55_resets[] = {
[GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0xe000 },
};

static struct gdsc *gcc_sdx55_gdscs[] = {
[USB30_GDSC] = &usb30_gdsc,
[PCIE_GDSC] = &pcie_gdsc,
[EMAC_GDSC] = &emac_gdsc,
};

static const struct regmap_config gcc_sdx55_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
Expand All @@ -1574,6 +1605,8 @@ static const struct qcom_cc_desc gcc_sdx55_desc = {
.num_clks = ARRAY_SIZE(gcc_sdx55_clocks),
.resets = gcc_sdx55_resets,
.num_resets = ARRAY_SIZE(gcc_sdx55_resets),
.gdscs = gcc_sdx55_gdscs,
.num_gdscs = ARRAY_SIZE(gcc_sdx55_gdscs),
};

static const struct of_device_id gcc_sdx55_match_table[] = {
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