Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel…

…/git/vapier/blackfin

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (30 commits)
  Blackfin: SMP: fix continuation lines
  Blackfin: acvilon: fix timeout usage for I2C
  Blackfin: fix typo in BF537 IRQ comment
  Blackfin: unify duplicate MEM_MT48LC32M8A2_75 kconfig options
  Blackfin: set ARCH_KMALLOC_MINALIGN
  Blackfin: use atomic kmalloc in L1 alloc so it too can be atomic
  Blackfin: another year of changes (update copyright in boot log)
  Blackfin: optimize strncpy a bit
  Blackfin: isram: clean up ITEST_COMMAND macro and improve the selftests
  Blackfin: move string functions to normal lib/ assembly
  Blackfin: SIC: cut down on IAR MMR reads a bit
  Blackfin: bf537-minotaur: fix build errors due to header changes
  Blackfin: kgdb: pass up the CC register instead of a 0 stub
  Blackfin: handle HW errors in the new "FAULT" printing code
  Blackfin: show the whole accumulator in the pseudo DBG insn
  Blackfin: support all possible registers in the pseudo instructions
  Blackfin: add support for the DBG (debug output) pseudo insn
  Blackfin: change the BUG opcode to an unused 16-bit opcode
  Blackfin: allow NMI watchdog to be used w/RETN as a scratch reg
  Blackfin: add support for the DBGA (debug assert) pseudo insn
  ...

arch/blackfin/Kconfig

@@ -348,7 +348,7 @@ config MEM_MT48LC16M16A2TG_75
 
 config MEM_MT48LC32M8A2_75
 	bool
-	depends on (BFIN537_STAMP || PNAV10 || BFIN538_EZKIT)
+	depends on (BFIN518F_EZBRD || BFIN537_STAMP || PNAV10 || BFIN538_EZKIT)
 	default y
 
 config MEM_MT48LC8M32B2B5_7
@@ -361,11 +361,6 @@ config MEM_MT48LC32M16A2TG_75
 	depends on (BFIN527_EZKIT || BFIN527_EZKIT_V2 || BFIN532_IP0X || BLACKSTAMP)
 	default y
 
-config MEM_MT48LC32M8A2_75
-	bool
-	depends on (BFIN518F_EZBRD)
-	default y
-
 config MEM_MT48H32M16LFCJ_75
 	bool
 	depends on (BFIN526_EZBRD)
@@ -791,6 +786,34 @@ config MEMCPY_L1
 	  If enabled, the memcpy function is linked
 	  into L1 instruction memory. (less latency)
 
+config STRCMP_L1
+	bool "locate strcmp function in L1 Memory"
+	default y
+	help
+	  If enabled, the strcmp function is linked
+	  into L1 instruction memory (less latency).
+
+config STRNCMP_L1
+	bool "locate strncmp function in L1 Memory"
+	default y
+	help
+	  If enabled, the strncmp function is linked
+	  into L1 instruction memory (less latency).
+
+config STRCPY_L1
+	bool "locate strcpy function in L1 Memory"
+	default y
+	help
+	  If enabled, the strcpy function is linked
+	  into L1 instruction memory (less latency).
+
+config STRNCPY_L1
+	bool "locate strncpy function in L1 Memory"
+	default y
+	help
+	  If enabled, the strncpy function is linked
+	  into L1 instruction memory (less latency).
+
 config SYS_BFIN_SPINLOCK_L1
 	bool "Locate sys_bfin_spinlock function in L1 Memory"
 	default y
@@ -1187,32 +1210,6 @@ config  PM_BFIN_SLEEP
 	  If unsure, select "Sleep Deeper".
 endchoice
 
-config PM_WAKEUP_BY_GPIO
-	bool "Allow Wakeup from Standby by GPIO"
-	depends on PM && !BF54x
-
-config PM_WAKEUP_GPIO_NUMBER
-	int "GPIO number"
-	range 0 47
-	depends on PM_WAKEUP_BY_GPIO
-	default 2
-
-choice
-	prompt "GPIO Polarity"
-	depends on PM_WAKEUP_BY_GPIO
-	default PM_WAKEUP_GPIO_POLAR_H
-config  PM_WAKEUP_GPIO_POLAR_H
-	bool "Active High"
-config  PM_WAKEUP_GPIO_POLAR_L
-	bool "Active Low"
-config  PM_WAKEUP_GPIO_POLAR_EDGE_F
-	bool "Falling EDGE"
-config  PM_WAKEUP_GPIO_POLAR_EDGE_R
-	bool "Rising EDGE"
-config  PM_WAKEUP_GPIO_POLAR_EDGE_B
-	bool "Both EDGE"
-endchoice
-
 comment "Possible Suspend Mem / Hibernate Wake-Up Sources"
 	depends on PM
 

arch/blackfin/Kconfig.debug

@@ -238,7 +238,7 @@ config EARLY_PRINTK
 config NMI_WATCHDOG
 	bool "Enable NMI watchdog to help debugging lockup on SMP"
 	default n
-	depends on (SMP && !BFIN_SCRATCH_REG_RETN)
+	depends on SMP
 	help
 	  If any CPU in the system does not execute the period local timer
 	  interrupt for more than 5 seconds, then the NMI handler dumps debug
@@ -264,4 +264,13 @@ config BFIN_ISRAM_SELF_TEST
 	help
 	  Run some self tests of the isram driver code at boot.
 
+config BFIN_PSEUDODBG_INSNS
+	bool "Support pseudo debug instructions"
+	default n
+	help
+	  This option allows the kernel to emulate some pseudo instructions which
+	  allow simulator test cases to be run under Linux with no changes.
+
+	  Most people should say N here.
+
 endmenu

arch/blackfin/include/asm/bfin-global.h

@@ -39,9 +39,15 @@ extern unsigned long sclk_to_usecs(unsigned long sclk);
 extern unsigned long usecs_to_sclk(unsigned long usecs);
 
 struct pt_regs;
+#if defined(CONFIG_DEBUG_VERBOSE)
 extern void dump_bfin_process(struct pt_regs *regs);
 extern void dump_bfin_mem(struct pt_regs *regs);
 extern void dump_bfin_trace_buffer(void);
+#else
+#define dump_bfin_process(regs)
+#define dump_bfin_mem(regs)
+#define dump_bfin_trace_buffer()
+#endif
 
 /* init functions only */
 extern int init_arch_irq(void);

arch/blackfin/include/asm/bug.h

@@ -9,7 +9,12 @@
 
 #ifdef CONFIG_BUG
 
-#define BFIN_BUG_OPCODE	0xefcd
+/*
+ * This can be any undefined 16-bit opcode, meaning
+ * ((opcode & 0xc000) != 0xc000)
+ * Anything from 0x0001 to 0x000A (inclusive) will work
+ */
+#define BFIN_BUG_OPCODE	0x0001
 
 #ifdef CONFIG_DEBUG_BUGVERBOSE
 

arch/blackfin/include/asm/cache.h

@@ -15,6 +15,8 @@
 #define L1_CACHE_BYTES	(1 << L1_CACHE_SHIFT)
 #define SMP_CACHE_BYTES	L1_CACHE_BYTES
 
+#define ARCH_KMALLOC_MINALIGN	L1_CACHE_BYTES
+
 #ifdef CONFIG_SMP
 #define __cacheline_aligned
 #else

arch/blackfin/include/asm/gpio.h

@@ -167,23 +167,23 @@ int bfin_special_gpio_request(unsigned gpio, const char *label);
 #endif
 
 #ifdef CONFIG_PM
+int bfin_pm_standby_ctrl(unsigned ctrl);
 
-unsigned int bfin_pm_standby_setup(void);
-void bfin_pm_standby_restore(void);
+static inline int bfin_pm_standby_setup(void)
+{
+	return bfin_pm_standby_ctrl(1);
+}
+
+static inline void bfin_pm_standby_restore(void)
+{
+	bfin_pm_standby_ctrl(0);
+}
 
 void bfin_gpio_pm_hibernate_restore(void);
 void bfin_gpio_pm_hibernate_suspend(void);
 
 #ifndef CONFIG_BF54x
-#define PM_WAKE_RISING	0x1
-#define PM_WAKE_FALLING	0x2
-#define PM_WAKE_HIGH	0x4
-#define PM_WAKE_LOW	0x8
-#define PM_WAKE_BOTH_EDGES	(PM_WAKE_RISING | PM_WAKE_FALLING)
-#define PM_WAKE_IGNORE	0xF0
-
-int gpio_pm_wakeup_request(unsigned gpio, unsigned char type);
-void gpio_pm_wakeup_free(unsigned gpio);
+int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
 
 struct gpio_port_s {
 	unsigned short data;

arch/blackfin/include/asm/pgtable.h

@@ -80,7 +80,8 @@ PTE_BIT_FUNC(mkyoung, |= _PAGE_ACCESSED);
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
  */
-#define ZERO_PAGE(vaddr)	(virt_to_page(0))
+#define ZERO_PAGE(vaddr)	virt_to_page(empty_zero_page)
+extern char empty_zero_page[];
 
 extern unsigned int kobjsize(const void *objp);
 

arch/blackfin/include/asm/pseudo_instructions.h

@@ -0,0 +1,18 @@
+/*
+ * header file for pseudo instructions
+ *
+ * Copyright 2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef _BLACKFIN_PSEUDO_
+#define _BLACKFIN_PSEUDO_
+
+#include <linux/types.h>
+#include <asm/ptrace.h>
+
+extern bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode);
+extern bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode);
+
+#endif

arch/blackfin/include/asm/string.h

@@ -12,121 +12,16 @@
 #ifdef __KERNEL__		/* only set these up for kernel code */
 
 #define __HAVE_ARCH_STRCPY
-extern inline char *strcpy(char *dest, const char *src)
-{
-	char *xdest = dest;
-	char temp = 0;
-
-	__asm__ __volatile__ (
-		"1:"
-		"%2 = B [%1++] (Z);"
-		"B [%0++] = %2;"
-		"CC = %2;"
-		"if cc jump 1b (bp);"
-		: "+&a" (dest), "+&a" (src), "=&d" (temp)
-		:
-		: "memory", "CC");
-
-	return xdest;
-}
+extern char *strcpy(char *dest, const char *src);
 
 #define __HAVE_ARCH_STRNCPY
-extern inline char *strncpy(char *dest, const char *src, size_t n)
-{
-	char *xdest = dest;
-	char temp = 0;
-
-	if (n == 0)
-		return xdest;
-
-	__asm__ __volatile__ (
-		"1:"
-		"%3 = B [%1++] (Z);"
-		"B [%0++] = %3;"
-		"CC = %3;"
-		"if ! cc jump 2f;"
-		"%2 += -1;"
-		"CC = %2 == 0;"
-		"if ! cc jump 1b (bp);"
-		"jump 4f;"
-		"2:"
-		/* if src is shorter than n, we need to null pad bytes now */
-		"%3 = 0;"
-		"3:"
-		"%2 += -1;"
-		"CC = %2 == 0;"
-		"if cc jump 4f;"
-		"B [%0++] = %3;"
-		"jump 3b;"
-		"4:"
-		: "+&a" (dest), "+&a" (src), "+&da" (n), "=&d" (temp)
-		:
-		: "memory", "CC");
-
-	return xdest;
-}
+extern char *strncpy(char *dest, const char *src, size_t n);
 
 #define __HAVE_ARCH_STRCMP
-extern inline int strcmp(const char *cs, const char *ct)
-{
-	/* need to use int's here so the char's in the assembly don't get
-	 * sign extended incorrectly when we don't want them to be
-	 */
-	int __res1, __res2;
-
-	__asm__ __volatile__ (
-		"1:"
-		"%2 = B[%0++] (Z);"      /* get *cs */
-		"%3 = B[%1++] (Z);"      /* get *ct */
-		"CC = %2 == %3;"         /* compare a byte */
-		"if ! cc jump 2f;"       /* not equal, break out */
-		"CC = %2;"               /* at end of cs? */
-		"if cc jump 1b (bp);"    /* no, keep going */
-		"jump.s 3f;"             /* strings are equal */
-		"2:"
-		"%2 = %2 - %3;"          /* *cs - *ct */
-		"3:"
-		: "+&a" (cs), "+&a" (ct), "=&d" (__res1), "=&d" (__res2)
-		:
-		: "memory", "CC");
-
-	return __res1;
-}
+extern int strcmp(const char *cs, const char *ct);
 
 #define __HAVE_ARCH_STRNCMP
-extern inline int strncmp(const char *cs, const char *ct, size_t count)
-{
-	/* need to use int's here so the char's in the assembly don't get
-	 * sign extended incorrectly when we don't want them to be
-	 */
-	int __res1, __res2;
-
-	if (!count)
-		return 0;
-
-	__asm__ __volatile__ (
-		"1:"
-		"%3 = B[%0++] (Z);"      /* get *cs */
-		"%4 = B[%1++] (Z);"      /* get *ct */
-		"CC = %3 == %4;"         /* compare a byte */
-		"if ! cc jump 3f;"       /* not equal, break out */
-		"CC = %3;"               /* at end of cs? */
-		"if ! cc jump 4f;"       /* yes, all done */
-		"%2 += -1;"              /* no, adjust count */
-		"CC = %2 == 0;"
-		"if ! cc jump 1b;"       /* more to do, keep going */
-		"2:"
-		"%3 = 0;"                /* strings are equal */
-		"jump.s 4f;"
-		"3:"
-		"%3 = %3 - %4;"          /* *cs - *ct */
-		"4:"
-		: "+&a" (cs), "+&a" (ct), "+&da" (count), "=&d" (__res1), "=&d" (__res2)
-		:
-		: "memory", "CC");
-
-	return __res1;
-}
+extern int strncmp(const char *cs, const char *ct, size_t count);
 
 #define __HAVE_ARCH_MEMSET
 extern void *memset(void *s, int c, size_t count);

arch/blackfin/include/asm/tlbflush.h

@@ -1 +1,2 @@
 #include <asm-generic/tlbflush.h>
+#define flush_tlb_kernel_range(s, e) do { } while (0)

arch/blackfin/include/asm/trace.h

@@ -23,6 +23,13 @@
 #ifndef __ASSEMBLY__
 extern unsigned long trace_buff_offset;
 extern unsigned long software_trace_buff[];
+#if defined(CONFIG_DEBUG_VERBOSE)
+extern void decode_address(char *buf, unsigned long address);
+extern bool get_instruction(unsigned int *val, unsigned short *address);
+#else
+static inline void decode_address(char *buf, unsigned long address) { }
+static inline bool get_instruction(unsigned int *val, unsigned short *address) { return false; }
+#endif
 
 /* Trace Macros for C files */
 

arch/blackfin/kernel/Makefile

@@ -7,7 +7,8 @@ extra-y := init_task.o vmlinux.lds
 obj-y := \
 	entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
 	sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \
-	fixed_code.o reboot.o bfin_gpio.o bfin_dma_5xx.o
+	fixed_code.o reboot.o bfin_gpio.o bfin_dma_5xx.o \
+	exception.o dumpstack.o
 
 ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y)
     obj-y += time-ts.o
@@ -29,6 +30,8 @@ obj-$(CONFIG_NMI_WATCHDOG)           += nmi.o
 obj-$(CONFIG_EARLY_PRINTK)           += early_printk.o
 obj-$(CONFIG_EARLY_PRINTK)           += shadow_console.o
 obj-$(CONFIG_STACKTRACE)             += stacktrace.o
+obj-$(CONFIG_DEBUG_VERBOSE)          += trace.o
+obj-$(CONFIG_BFIN_PSEUDODBG_INSNS)   += pseudodbg.o
 
 # the kgdb test puts code into L2 and without linker
 # relaxation, we need to force long calls to/from it