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x86/smp: Drop 32-bit "bigsmp" machine support
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The x86-32 kernel used to support multiple platforms with more than eight
logical CPUs, from the 1999-2003 timeframe: Sequent NUMA-Q, IBM Summit,
Unisys ES7000 and HP F8. Support for all except the latter was dropped
back in 2014, leaving only the F8 based DL740 and DL760 G2 machines in
this catery, with up to eight single-core Socket-603 Xeon-MP processors
with hyperthreading.

Like the already removed machines, the HP F8 servers at the time cost
upwards of $100k in typical configurations, but were quickly obsoleted
by their 64-bit Socket-604 cousins and the AMD Opteron.

Earlier servers with up to 8 Pentium Pro or Xeon processors remain
fully supported as they had no hyperthreading. Similarly, the more
common 4-socket Xeon-MP machines with hyperthreading using Intel
or ServerWorks chipsets continue to work without this, and all the
multi-core Xeon processors also run 64-bit kernels.

While the "bigsmp" support can also be used to run on later 64-bit
machines (including VM guests), it seems best to discourage that
and get any remaining users to update their kernels to 64-bit builds
on these. As a side-effect of this, there is also no more need to
support NUMA configurations on 32-bit x86, as all true 32-bit
NUMA platforms are already gone.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://lore.kernel.org/r/20250226213714.4040853-3-arnd@kernel.org
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Arnd Bergmann authored and Ingo Molnar committed Feb 27, 2025
1 parent 6ac43f2 commit 0abf508
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Showing 7 changed files with 4 additions and 173 deletions.
4 changes: 0 additions & 4 deletions Documentation/admin-guide/kernel-parameters.txt
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Expand Up @@ -416,10 +416,6 @@
Format: { quiet (default) | verbose | debug }
Change the amount of debugging information output
when initialising the APIC and IO-APIC components.
For X86-32, this can also be used to specify an APIC
driver name.
Format: apic=driver_name
Examples: apic=bigsmp

apic_extnmi= [APIC,X86,EARLY] External NMI delivery setting
Format: { bsp (default) | all | none }
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20 changes: 4 additions & 16 deletions arch/x86/Kconfig
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Expand Up @@ -531,12 +531,6 @@ config X86_FRED
ring transitions and exception/interrupt handling if the
system supports it.

config X86_BIGSMP
bool "Support for big SMP systems with more than 8 CPUs"
depends on SMP && X86_32
help
This option is needed for the systems that have more than 8 CPUs.

config X86_EXTENDED_PLATFORM
bool "Support for extended (non-PC) x86 platforms"
default y
Expand Down Expand Up @@ -735,8 +729,8 @@ config X86_32_NON_STANDARD
depends on X86_32 && SMP
depends on X86_EXTENDED_PLATFORM
help
This option compiles in the bigsmp and STA2X11 default
subarchitectures. It is intended for a generic binary
This option compiles in the STA2X11 default
subarchitecture. It is intended for a generic binary
kernel. If you select them all, kernel will probe it one by
one and will fallback to default.

Expand Down Expand Up @@ -1013,8 +1007,7 @@ config NR_CPUS_RANGE_BEGIN
config NR_CPUS_RANGE_END
int
depends on X86_32
default 64 if SMP && X86_BIGSMP
default 8 if SMP && !X86_BIGSMP
default 8 if SMP
default 1 if !SMP

config NR_CPUS_RANGE_END
Expand All @@ -1027,7 +1020,6 @@ config NR_CPUS_RANGE_END
config NR_CPUS_DEFAULT
int
depends on X86_32
default 32 if X86_BIGSMP
default 8 if SMP
default 1 if !SMP

Expand Down Expand Up @@ -1574,8 +1566,7 @@ config AMD_MEM_ENCRYPT
config NUMA
bool "NUMA Memory Allocation and Scheduler Support"
depends on SMP
depends on X86_64 || (X86_32 && HIGHMEM64G && X86_BIGSMP)
default y if X86_BIGSMP
depends on X86_64
select USE_PERCPU_NUMA_NODE_ID
select OF_NUMA if OF
help
Expand All @@ -1588,9 +1579,6 @@ config NUMA
For 64-bit this is recommended if the system is Intel Core i7
(or later), AMD Opteron, or EM64T NUMA.

For 32-bit this is only needed if you boot a 32-bit
kernel on a 64-bit NUMA platform.

Otherwise, you should say N.

config AMD_NUMA
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3 changes: 0 additions & 3 deletions arch/x86/kernel/apic/Makefile
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Expand Up @@ -23,8 +23,5 @@ obj-$(CONFIG_X86_X2APIC) += x2apic_cluster.o
obj-y += apic_flat_64.o
endif

# APIC probe will depend on the listing order here
obj-$(CONFIG_X86_BIGSMP) += bigsmp_32.o

# For 32bit, probe_32 need to be listed last
obj-$(CONFIG_X86_LOCAL_APIC) += probe_$(BITS).o
3 changes: 0 additions & 3 deletions arch/x86/kernel/apic/apic.c
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Expand Up @@ -1371,8 +1371,6 @@ void __init apic_intr_mode_init(void)

x86_64_probe_apic();

x86_32_install_bigsmp();

if (x86_platform.apic_post_init)
x86_platform.apic_post_init();

Expand Down Expand Up @@ -1674,7 +1672,6 @@ static __init void apic_read_boot_cpu_id(bool x2apic)
boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));
}
topology_register_boot_apic(boot_cpu_physical_apicid);
x86_32_probe_bigsmp_early();
}

#ifdef CONFIG_X86_X2APIC
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105 changes: 0 additions & 105 deletions arch/x86/kernel/apic/bigsmp_32.c
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This file was deleted.

13 changes: 0 additions & 13 deletions arch/x86/kernel/apic/local.h
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Expand Up @@ -65,17 +65,4 @@ void default_send_IPI_self(int vector);
void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, int vector);
void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, int vector);
void default_send_IPI_mask_logical(const struct cpumask *mask, int vector);
void x86_32_probe_bigsmp_early(void);
void x86_32_install_bigsmp(void);
#else
static inline void x86_32_probe_bigsmp_early(void) { }
static inline void x86_32_install_bigsmp(void) { }
#endif

#ifdef CONFIG_X86_BIGSMP
bool apic_bigsmp_possible(bool cmdline_selected);
void apic_bigsmp_force(void);
#else
static inline bool apic_bigsmp_possible(bool cmdline_selected) { return false; };
static inline void apic_bigsmp_force(void) { }
#endif
29 changes: 0 additions & 29 deletions arch/x86/kernel/apic/probe_32.c
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Expand Up @@ -93,35 +93,6 @@ static int __init parse_apic(char *arg)
}
early_param("apic", parse_apic);

void __init x86_32_probe_bigsmp_early(void)
{
if (nr_cpu_ids <= 8 || xen_pv_domain())
return;

if (IS_ENABLED(CONFIG_X86_BIGSMP)) {
switch (boot_cpu_data.x86_vendor) {
case X86_VENDOR_INTEL:
if (!APIC_XAPIC(boot_cpu_apic_version))
break;
/* P4 and above */
fallthrough;
case X86_VENDOR_HYGON:
case X86_VENDOR_AMD:
if (apic_bigsmp_possible(cmdline_apic))
return;
break;
}
}
pr_info("Limiting to 8 possible CPUs\n");
set_nr_cpu_ids(8);
}

void __init x86_32_install_bigsmp(void)
{
if (nr_cpu_ids > 8 && !xen_pv_domain())
apic_bigsmp_force();
}

void __init x86_32_probe_apic(void)
{
if (!cmdline_apic) {
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