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MIPS: ralink: mt7620: Add spi clock definition
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Register a clock device for the SPI block of the
MT7620 SoC. The clock device will be used by the
SPI host controller driver to determine the base
clock of the controller.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5754/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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John Crispin authored and Ralf Baechle committed Sep 4, 2013
1 parent 68c9b7e commit 0d46496
Showing 1 changed file with 1 addition and 0 deletions.
1 change: 1 addition & 0 deletions arch/mips/ralink/mt7620.c
Original file line number Diff line number Diff line change
Expand Up @@ -318,6 +318,7 @@ void __init ralink_clk_init(void)
ralink_clk_add("10000100.timer", periph_rate);
ralink_clk_add("10000120.watchdog", periph_rate);
ralink_clk_add("10000500.uart", periph_rate);
ralink_clk_add("10000b00.spi", sys_rate);
ralink_clk_add("10000c00.uartlite", periph_rate);
}

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