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watchdog: qcom: add support for KPSS WDT
Add a driver for the watchdog timer block found in the Krait Processor Subsystem (KPSS) on the MSM8960, APQ8064, and IPQ8064. Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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Josh Cartwright
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Wim Van Sebroeck
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Oct 20, 2014
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/* Copyright (c) 2014, The Linux Foundation. All rights reserved. | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 and | ||
* only version 2 as published by the Free Software Foundation. | ||
* | ||
* This program is distributed in the hope that it will be useful, | ||
* but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
* GNU General Public License for more details. | ||
* | ||
*/ | ||
#include <linux/clk.h> | ||
#include <linux/io.h> | ||
#include <linux/kernel.h> | ||
#include <linux/module.h> | ||
#include <linux/of.h> | ||
#include <linux/platform_device.h> | ||
#include <linux/watchdog.h> | ||
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#define WDT_RST 0x0 | ||
#define WDT_EN 0x8 | ||
#define WDT_BITE_TIME 0x24 | ||
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struct qcom_wdt { | ||
struct watchdog_device wdd; | ||
struct clk *clk; | ||
unsigned long rate; | ||
void __iomem *base; | ||
}; | ||
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static inline | ||
struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd) | ||
{ | ||
return container_of(wdd, struct qcom_wdt, wdd); | ||
} | ||
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static int qcom_wdt_start(struct watchdog_device *wdd) | ||
{ | ||
struct qcom_wdt *wdt = to_qcom_wdt(wdd); | ||
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writel(0, wdt->base + WDT_EN); | ||
writel(1, wdt->base + WDT_RST); | ||
writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME); | ||
writel(1, wdt->base + WDT_EN); | ||
return 0; | ||
} | ||
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static int qcom_wdt_stop(struct watchdog_device *wdd) | ||
{ | ||
struct qcom_wdt *wdt = to_qcom_wdt(wdd); | ||
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writel(0, wdt->base + WDT_EN); | ||
return 0; | ||
} | ||
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static int qcom_wdt_ping(struct watchdog_device *wdd) | ||
{ | ||
struct qcom_wdt *wdt = to_qcom_wdt(wdd); | ||
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writel(1, wdt->base + WDT_RST); | ||
return 0; | ||
} | ||
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static int qcom_wdt_set_timeout(struct watchdog_device *wdd, | ||
unsigned int timeout) | ||
{ | ||
wdd->timeout = timeout; | ||
return qcom_wdt_start(wdd); | ||
} | ||
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static const struct watchdog_ops qcom_wdt_ops = { | ||
.start = qcom_wdt_start, | ||
.stop = qcom_wdt_stop, | ||
.ping = qcom_wdt_ping, | ||
.set_timeout = qcom_wdt_set_timeout, | ||
.owner = THIS_MODULE, | ||
}; | ||
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static const struct watchdog_info qcom_wdt_info = { | ||
.options = WDIOF_KEEPALIVEPING | ||
| WDIOF_MAGICCLOSE | ||
| WDIOF_SETTIMEOUT, | ||
.identity = KBUILD_MODNAME, | ||
}; | ||
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static int qcom_wdt_probe(struct platform_device *pdev) | ||
{ | ||
struct qcom_wdt *wdt; | ||
struct resource *res; | ||
int ret; | ||
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wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); | ||
if (!wdt) | ||
return -ENOMEM; | ||
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
wdt->base = devm_ioremap_resource(&pdev->dev, res); | ||
if (IS_ERR(wdt->base)) | ||
return PTR_ERR(wdt->base); | ||
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wdt->clk = devm_clk_get(&pdev->dev, NULL); | ||
if (IS_ERR(wdt->clk)) { | ||
dev_err(&pdev->dev, "failed to get input clock\n"); | ||
return PTR_ERR(wdt->clk); | ||
} | ||
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ret = clk_prepare_enable(wdt->clk); | ||
if (ret) { | ||
dev_err(&pdev->dev, "failed to setup clock\n"); | ||
return ret; | ||
} | ||
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/* | ||
* We use the clock rate to calculate the max timeout, so ensure it's | ||
* not zero to avoid a divide-by-zero exception. | ||
* | ||
* WATCHDOG_CORE assumes units of seconds, if the WDT is clocked such | ||
* that it would bite before a second elapses it's usefulness is | ||
* limited. Bail if this is the case. | ||
*/ | ||
wdt->rate = clk_get_rate(wdt->clk); | ||
if (wdt->rate == 0 || | ||
wdt->rate > 0x10000000U) { | ||
dev_err(&pdev->dev, "invalid clock rate\n"); | ||
ret = -EINVAL; | ||
goto err_clk_unprepare; | ||
} | ||
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wdt->wdd.dev = &pdev->dev; | ||
wdt->wdd.info = &qcom_wdt_info; | ||
wdt->wdd.ops = &qcom_wdt_ops; | ||
wdt->wdd.min_timeout = 1; | ||
wdt->wdd.max_timeout = 0x10000000U / wdt->rate; | ||
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/* | ||
* If 'timeout-sec' unspecified in devicetree, assume a 30 second | ||
* default, unless the max timeout is less than 30 seconds, then use | ||
* the max instead. | ||
*/ | ||
wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U); | ||
watchdog_init_timeout(&wdt->wdd, 0, &pdev->dev); | ||
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ret = watchdog_register_device(&wdt->wdd); | ||
if (ret) { | ||
dev_err(&pdev->dev, "failed to register watchdog\n"); | ||
goto err_clk_unprepare; | ||
} | ||
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platform_set_drvdata(pdev, wdt); | ||
return 0; | ||
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err_clk_unprepare: | ||
clk_disable_unprepare(wdt->clk); | ||
return ret; | ||
} | ||
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static int qcom_wdt_remove(struct platform_device *pdev) | ||
{ | ||
struct qcom_wdt *wdt = platform_get_drvdata(pdev); | ||
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watchdog_unregister_device(&wdt->wdd); | ||
clk_disable_unprepare(wdt->clk); | ||
return 0; | ||
} | ||
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static const struct of_device_id qcom_wdt_of_table[] = { | ||
{ .compatible = "qcom,kpss-wdt-msm8960", }, | ||
{ .compatible = "qcom,kpss-wdt-apq8064", }, | ||
{ .compatible = "qcom,kpss-wdt-ipq8064", }, | ||
{ }, | ||
}; | ||
MODULE_DEVICE_TABLE(of, qcom_wdt_of_table); | ||
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static struct platform_driver qcom_watchdog_driver = { | ||
.probe = qcom_wdt_probe, | ||
.remove = qcom_wdt_remove, | ||
.driver = { | ||
.name = KBUILD_MODNAME, | ||
.of_match_table = qcom_wdt_of_table, | ||
}, | ||
}; | ||
module_platform_driver(qcom_watchdog_driver); | ||
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MODULE_DESCRIPTION("QCOM KPSS Watchdog Driver"); | ||
MODULE_LICENSE("GPL v2"); |