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Merge cpufreq updates for 6.10:
- Rework the handling of disabled turbo in the intel_pstate driver and
make it update the maximum CPU frequency consistently regardless of
the reason on top of a number of cleanups (Rafael Wysocki).
- Add missing checks for NULL .exit() cpufreq driver callback to the
cpufreq core (Viresh Kumar).
- Prevent pulicy->max from going above the frequency QoS maximum value
when cpufreq_frequency_table_verify() is used (Xuewen Yan).
- Prevent a negative CPU number or frequency value from being printed
if they are really large (Joshua Yeong).
- Update MAINTAINERS entry for amd-pstate to add two new submaintainers
and a designated reviewer (Huang Rui).
- Clean up the amd-pstate driver and update its documentation (Gautham
Shenoy).
- Fix the highest frequency issue in the amd-pstate driver which limits
performance (Perry Yuan).
- Enable CPPC v2 for certain processors in the family 17H, as requested
by TR40 processor users who expect improved performance and lower
system temperature (Perry Yuan).
- Change latency and delay values to be read from platform firmware
firstly for more accurate timing (Perry Yuan).
- A new quirk is introduced for supporting amd-pstate on legacy
processors which either lack CPPC capability, or only only have CPPC
v2 capability (Perry Yuan).
- Sun50i: Add support for opp_supported_hw, H616 platform and general
cleanups (Andre Przywara, Martin Botka, Brandon Cheo Fusi, Dan
Carpenter, Viresh Kumar).
- CPPC: Fix possible null pointer dereference (Aleksandr Mishin).
- Eliminate uses of of_node_put() (Javier Carrasco, and Shivani Gupta).
- brcmstb-avs: ISO C90 forbids mixed declarations (Portia Stephens).
- mediatek: Add support for MT7988A (Sam Shih).
- cpufreq-qcom-hw: Add SM4450 compatibles in DT bindings (Tengfei Fan).
- Fix struct cpudata::epp_cached kernel-doc in the intel_pstate cpufreq
driver (Jeff Johnson).
* pm-cpufreq: (46 commits)
cpufreq: amd-pstate: fix the highest frequency issue which limits performance
cpufreq: intel_pstate: fix struct cpudata::epp_cached kernel-doc
cpufreq: Fix up printing large CPU numbers and frequency values
MAINTAINERS: cpufreq: amd-pstate: Add co-maintainers and reviewer
cpufreq: amd-pstate: remove unused variable lowest_nonlinear_freq
cpufreq: amd-pstate: fix code format problems
cpufreq: amd-pstate: Add quirk for the pstate CPPC capabilities missing
cppc_acpi: print error message if CPPC is unsupported
cpufreq: amd-pstate: get transition delay and latency value from ACPI tables
cpufreq: amd-pstate: Bail out if min/max/nominal_freq is 0
cpufreq: amd-pstate: Remove amd_get_{min,max,nominal,lowest_nonlinear}_freq()
cpufreq: amd-pstate: Unify computation of {max,min,nominal,lowest_nonlinear}_freq
cpufreq: amd-pstate: Document the units for freq variables in amd_cpudata
cpufreq: amd-pstate: Document *_limit_* fields in struct amd_cpudata
dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM4450 compatibles
cpufreq: sun50i: fix error returns in dt_has_supported_hw()
cpufreq: brcmstb-avs-cpufreq: ISO C90 forbids mixed declarations
cpufreq: dt-platdev: eliminate uses of of_node_put()
cpufreq: dt: eliminate uses of of_node_put()
cpufreq: ti: Implement scope-based cleanup in ti_cpufreq_match_node()
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,115 @@ | ||
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| // Copyright (C) 2023 Martin Botka <martin@somainline.org> | ||
|
|
||
| / { | ||
| cpu_opp_table: opp-table-cpu { | ||
| compatible = "allwinner,sun50i-h616-operating-points"; | ||
| nvmem-cells = <&cpu_speed_grade>; | ||
| opp-shared; | ||
|
|
||
| opp-480000000 { | ||
| opp-hz = /bits/ 64 <480000000>; | ||
| opp-microvolt = <900000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x1f>; | ||
| }; | ||
|
|
||
| opp-600000000 { | ||
| opp-hz = /bits/ 64 <600000000>; | ||
| opp-microvolt = <900000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x12>; | ||
| }; | ||
|
|
||
| opp-720000000 { | ||
| opp-hz = /bits/ 64 <720000000>; | ||
| opp-microvolt = <900000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x0d>; | ||
| }; | ||
|
|
||
| opp-792000000 { | ||
| opp-hz = /bits/ 64 <792000000>; | ||
| opp-microvolt-speed1 = <900000>; | ||
| opp-microvolt-speed4 = <940000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x12>; | ||
| }; | ||
|
|
||
| opp-936000000 { | ||
| opp-hz = /bits/ 64 <936000000>; | ||
| opp-microvolt = <900000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x0d>; | ||
| }; | ||
|
|
||
| opp-1008000000 { | ||
| opp-hz = /bits/ 64 <1008000000>; | ||
| opp-microvolt-speed0 = <950000>; | ||
| opp-microvolt-speed1 = <940000>; | ||
| opp-microvolt-speed2 = <950000>; | ||
| opp-microvolt-speed3 = <950000>; | ||
| opp-microvolt-speed4 = <1020000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x1f>; | ||
| }; | ||
|
|
||
| opp-1104000000 { | ||
| opp-hz = /bits/ 64 <1104000000>; | ||
| opp-microvolt-speed0 = <1000000>; | ||
| opp-microvolt-speed2 = <1000000>; | ||
| opp-microvolt-speed3 = <1000000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x0d>; | ||
| }; | ||
|
|
||
| opp-1200000000 { | ||
| opp-hz = /bits/ 64 <1200000000>; | ||
| opp-microvolt-speed0 = <1050000>; | ||
| opp-microvolt-speed1 = <1020000>; | ||
| opp-microvolt-speed2 = <1050000>; | ||
| opp-microvolt-speed3 = <1050000>; | ||
| opp-microvolt-speed4 = <1100000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x1f>; | ||
| }; | ||
|
|
||
| opp-1320000000 { | ||
| opp-hz = /bits/ 64 <1320000000>; | ||
| opp-microvolt = <1100000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x1d>; | ||
| }; | ||
|
|
||
| opp-1416000000 { | ||
| opp-hz = /bits/ 64 <1416000000>; | ||
| opp-microvolt = <1100000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x0d>; | ||
| }; | ||
|
|
||
| opp-1512000000 { | ||
| opp-hz = /bits/ 64 <1512000000>; | ||
| opp-microvolt-speed1 = <1100000>; | ||
| opp-microvolt-speed3 = <1100000>; | ||
| clock-latency-ns = <244144>; /* 8 32k periods */ | ||
| opp-supported-hw = <0x0a>; | ||
| }; | ||
| }; | ||
| }; | ||
|
|
||
| &cpu0 { | ||
| operating-points-v2 = <&cpu_opp_table>; | ||
| }; | ||
|
|
||
| &cpu1 { | ||
| operating-points-v2 = <&cpu_opp_table>; | ||
| }; | ||
|
|
||
| &cpu2 { | ||
| operating-points-v2 = <&cpu_opp_table>; | ||
| }; | ||
|
|
||
| &cpu3 { | ||
| operating-points-v2 = <&cpu_opp_table>; | ||
| }; |
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