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drm/msm/dp: add support for DP PLL driver
Add the needed DP PLL specific files to support display port interface on msm targets. The DP driver calls the DP PLL driver registration. The DP driver sets the link and pixel clock sources. Changes in v2: -- Update copyright markings on all relevant files. -- Use DRM_DEBUG_DP for debug msgs. Changes in v4: -- Update the DP link clock provider names Changes in V5: -- Addressed comments from Stephen Boyd, Rob clark. Changes in V6: -- Remove PLL as separate driver and include PLL as DP module -- Remove redundant clock parsing from PLL module and make DP as clock provider -- Map USB3 DPCOM and PHY IO using hardcoded register address and move mapping form parser to PLL module -- Access DP PHY modules from same base address using offsets instead of deriving base address of individual module from device tree. -- Remove dp_pll_10nm_util.c and include its functionality in dp_pll_10nm.c -- Introduce new data structures private to PLL module Changes in v7: -- Remove DRM_MSM_DP_PLL config from Makefile and Kconfig -- Remove set_parent from determin_rate API -- Remove phy_pll_vco_div_clk from parent list -- Remove flag CLK_DIVIDER_ONE_BASED -- Remove redundant cell-index property parsing Changes in v8: -- Unregister hardware clocks during driver cleanup Changes in v9: -- Remove redundant Kconfig option DRM_MSM_DP_10NM_PLL Changes in v10: -- Limit 10nm PLL function scope Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org> Signed-off-by: Vara Reddy <varar@codeaurora.org> Signed-off-by: Tanmay Shah <tanmay@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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Chandan Uddaraju
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Rob Clark
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Sep 15, 2020
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,99 @@ | ||
| // SPDX-License-Identifier: GPL-2.0-only | ||
| /* | ||
| * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. | ||
| */ | ||
|
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| #include <linux/device.h> | ||
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| #include "dp_parser.h" | ||
| #include "dp_pll.h" | ||
| #include "dp_pll_private.h" | ||
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| static int dp_pll_get_phy_io(struct dp_parser *parser) | ||
| { | ||
| struct dp_io *io = &parser->io; | ||
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| io->usb3_dp_com.base = ioremap(REG_USB3_DP_COM_REGION_BASE, | ||
| REG_USB3_DP_COM_REGION_SIZE); | ||
| if (!io->usb3_dp_com.base) { | ||
| DRM_ERROR("unable to map USB3 DP COM IO\n"); | ||
| return -EIO; | ||
| } | ||
|
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| /* ToDo(user): DP PLL and DP PHY will not be part of | ||
| * DP driver eventually so for now Hardcode Base and offsets | ||
| * of PHY registers so we can remove them from dts and bindings | ||
| */ | ||
| io->phy_reg.base = ioremap(REG_DP_PHY_REGION_BASE, | ||
| REG_DP_PHY_REGION_SIZE); | ||
| if (!io->phy_reg.base) { | ||
| DRM_ERROR("DP PHY io region mapping failed\n"); | ||
| return -EIO; | ||
| } | ||
| io->phy_reg.len = REG_DP_PHY_REGION_SIZE; | ||
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| return 0; | ||
| } | ||
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| static int msm_dp_pll_init(struct msm_dp_pll *pll, | ||
| enum msm_dp_pll_type type, int id) | ||
| { | ||
| struct device *dev = &pll->pdev->dev; | ||
| int ret = 0; | ||
|
|
||
| switch (type) { | ||
| case MSM_DP_PLL_10NM: | ||
| ret = msm_dp_pll_10nm_init(pll, id); | ||
| break; | ||
| default: | ||
| DRM_DEV_ERROR(dev, "%s: Wrong PLL type %d\n", __func__, type); | ||
| return -ENXIO; | ||
| } | ||
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| if (ret) { | ||
| DRM_DEV_ERROR(dev, "%s: failed to init DP PLL\n", __func__); | ||
| return ret; | ||
| } | ||
|
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| pll->type = type; | ||
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| DRM_DEBUG_DP("DP:%d PLL registered", id); | ||
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| return ret; | ||
| } | ||
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| struct msm_dp_pll *dp_pll_get(struct dp_pll_in *pll_in) | ||
| { | ||
| struct msm_dp_pll *dp_pll; | ||
| struct dp_parser *parser = pll_in->parser; | ||
| struct dp_io_pll *pll_io; | ||
| int ret; | ||
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| dp_pll = devm_kzalloc(&pll_in->pdev->dev, sizeof(*dp_pll), GFP_KERNEL); | ||
| if (!dp_pll) | ||
| return ERR_PTR(-ENOMEM); | ||
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| pll_io = &dp_pll->pll_io; | ||
| dp_pll->pdev = pll_in->pdev; | ||
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| dp_pll_get_phy_io(parser); | ||
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| pll_io->pll_base = parser->io.phy_reg.base + DP_PHY_PLL_OFFSET; | ||
| pll_io->phy_base = parser->io.phy_reg.base + DP_PHY_REG_OFFSET; | ||
| pll_io->ln_tx0_base = parser->io.phy_reg.base + DP_PHY_LN_TX0_OFFSET; | ||
| pll_io->ln_tx1_base = parser->io.phy_reg.base + DP_PHY_LN_TX1_OFFSET; | ||
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| ret = msm_dp_pll_init(dp_pll, MSM_DP_PLL_10NM, 0); | ||
| if (ret) { | ||
| kfree(dp_pll); | ||
| return ERR_PTR(ret); | ||
| } | ||
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| return dp_pll; | ||
| } | ||
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| void dp_pll_put(struct msm_dp_pll *dp_pll) | ||
| { | ||
| if (dp_pll->type == MSM_DP_PLL_10NM) | ||
| msm_dp_pll_10nm_deinit(dp_pll); | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,61 @@ | ||
| /* SPDX-License-Identifier: GPL-2.0-only */ | ||
| /* | ||
| * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. | ||
| */ | ||
|
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| #ifndef __DP_PLL_H | ||
| #define __DP_PLL_H | ||
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| #include <linux/clk.h> | ||
| #include <linux/clk-provider.h> | ||
| #include <linux/platform_device.h> | ||
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| #include "dpu_io_util.h" | ||
| #include "msm_drv.h" | ||
| #include "dp_parser.h" | ||
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| #define PLL_REG_W(base, offset, data) \ | ||
| writel((data), (base) + (offset)) | ||
| #define PLL_REG_R(base, offset) readl((base) + (offset)) | ||
|
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| enum msm_dp_pll_type { | ||
| MSM_DP_PLL_10NM, | ||
| MSM_DP_PLL_MAX | ||
| }; | ||
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| struct dp_pll_in { | ||
| struct platform_device *pdev; | ||
| struct dp_parser *parser; | ||
| }; | ||
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| struct dp_io_pll { | ||
| void __iomem *pll_base; | ||
| void __iomem *phy_base; | ||
| void __iomem *ln_tx0_base; | ||
| void __iomem *ln_tx1_base; | ||
| }; | ||
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| struct msm_dp_pll { | ||
| enum msm_dp_pll_type type; | ||
| bool pll_on; | ||
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| struct dp_io_pll pll_io; | ||
|
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| /* clock-provider: */ | ||
| struct clk_hw_onecell_data *hw_data; | ||
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| struct platform_device *pdev; | ||
| void *priv; | ||
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| /* Pll specific resources like GPIO, power supply, clocks, etc*/ | ||
| struct dss_module_power mp; | ||
| int (*get_provider)(struct msm_dp_pll *pll, | ||
| struct clk **link_clk_provider, | ||
| struct clk **pixel_clk_provider); | ||
| }; | ||
|
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| struct msm_dp_pll *dp_pll_get(struct dp_pll_in *pll_in); | ||
|
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| void dp_pll_put(struct msm_dp_pll *dp_pll); | ||
|
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| #endif /* __DP_PLL_H */ |
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