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Merge branch 'sparx5-ES2-VCAP-support'
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Steen Hegelund says:

====================
Adding Sparx5 ES2 VCAP support

This provides the Egress Stage 2 (ES2) VCAP (Versatile Content-Aware
Processor) support for the Sparx5 platform.

The ES2 VCAP is an Egress Access Control VCAP that uses frame keyfields and
previously classified keyfields to apply e.g. policing, trapping or
mirroring to frames.

The ES2 VCAP has 2 lookups and they are accessible with a TC chain id:

- chain 20000000: ES2 Lookup 0
- chain 20100000: ES2 Lookup 1

As the other Sparx5 VCAPs the ES2 VCAP has its own lookup/port keyset
configuration that decides which keys will be used for matching on which
traffic type.

The ES2 VCAP has these traffic classifications:

- IPv4 frames
- IPv6 frames
- Other frames

The ES2 VCAP can match on an ISDX key (Ingress Service Index) as one of the
frame metadata keyfields.  The IS0 VCAP can update this key using its
actions, and this allows a IS0 VCAP rule to be linked to an ES2 rule.

This is similar to how the IS0 VCAP and the IS2 VCAP use the PAG
(Policy Association Group) keyfield to link rules.

From user space this is exposed via "chain offsets", so an IS0 rule with a
"goto chain 20000015" action will use an ISDX key value of 15 to link to a
rule in the ES2 VCAP attached to the same chain id.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller committed Jan 30, 2023
2 parents 5dd3beb + 1f741f0 commit 166a1a5
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Showing 19 changed files with 2,390 additions and 162 deletions.
3 changes: 2 additions & 1 deletion drivers/net/ethernet/microchip/lan966x/lan966x_main.h
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Original file line number Diff line number Diff line change
Expand Up @@ -603,7 +603,8 @@ int lan966x_vcap_init(struct lan966x *lan966x);
void lan966x_vcap_deinit(struct lan966x *lan966x);

int lan966x_tc_flower(struct lan966x_port *port,
struct flow_cls_offload *f);
struct flow_cls_offload *f,
bool ingress);

int lan966x_goto_port_add(struct lan966x_port *port,
int from_cid, int to_cid,
Expand Down
2 changes: 1 addition & 1 deletion drivers/net/ethernet/microchip/lan966x/lan966x_tc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ static int lan966x_tc_block_cb(enum tc_setup_type type, void *type_data,
case TC_SETUP_CLSMATCHALL:
return lan966x_tc_matchall(port, type_data, ingress);
case TC_SETUP_CLSFLOWER:
return lan966x_tc_flower(port, type_data);
return lan966x_tc_flower(port, type_data, ingress);
default:
return -EOPNOTSUPP;
}
Expand Down
16 changes: 10 additions & 6 deletions drivers/net/ethernet/microchip/lan966x/lan966x_tc_flower.c
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Original file line number Diff line number Diff line change
Expand Up @@ -83,7 +83,8 @@ static int lan966x_tc_flower_use_dissectors(struct flow_cls_offload *f,

static int lan966x_tc_flower_action_check(struct vcap_control *vctrl,
struct net_device *dev,
struct flow_cls_offload *fco)
struct flow_cls_offload *fco,
bool ingress)
{
struct flow_rule *rule = flow_cls_offload_flow_rule(fco);
struct flow_action_entry *actent, *last_actent = NULL;
Expand Down Expand Up @@ -120,7 +121,8 @@ static int lan966x_tc_flower_action_check(struct vcap_control *vctrl,
"Invalid goto chain");
return -EINVAL;
}
} else if (!vcap_is_last_chain(vctrl, fco->common.chain_index)) {
} else if (!vcap_is_last_chain(vctrl, fco->common.chain_index,
ingress)) {
NL_SET_ERR_MSG_MOD(fco->common.extack,
"Last action must be 'goto'");
return -EINVAL;
Expand All @@ -139,7 +141,8 @@ static int lan966x_tc_flower_action_check(struct vcap_control *vctrl,

static int lan966x_tc_flower_add(struct lan966x_port *port,
struct flow_cls_offload *f,
struct vcap_admin *admin)
struct vcap_admin *admin,
bool ingress)
{
struct flow_action_entry *act;
u16 l3_proto = ETH_P_ALL;
Expand All @@ -148,7 +151,7 @@ static int lan966x_tc_flower_add(struct lan966x_port *port,
int err, idx;

err = lan966x_tc_flower_action_check(port->lan966x->vcap_ctrl,
port->dev, f);
port->dev, f, ingress);
if (err)
return err;

Expand Down Expand Up @@ -232,7 +235,8 @@ static int lan966x_tc_flower_del(struct lan966x_port *port,
}

int lan966x_tc_flower(struct lan966x_port *port,
struct flow_cls_offload *f)
struct flow_cls_offload *f,
bool ingress)
{
struct vcap_admin *admin;

Expand All @@ -245,7 +249,7 @@ int lan966x_tc_flower(struct lan966x_port *port,

switch (f->command) {
case FLOW_CLS_REPLACE:
return lan966x_tc_flower_add(port, f, admin);
return lan966x_tc_flower_add(port, f, admin, ingress);
case FLOW_CLS_DESTROY:
return lan966x_tc_flower_del(port, f, admin);
default:
Expand Down
3 changes: 3 additions & 0 deletions drivers/net/ethernet/microchip/lan966x/lan966x_vcap_impl.c
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Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ static struct lan966x_vcap_inst {
int first_cid; /* first chain id in this vcap */
int last_cid; /* last chain id in this vcap */
int count; /* number of available addresses */
bool ingress; /* is vcap in the ingress path */
} lan966x_vcap_inst_cfg[] = {
{
.vtype = VCAP_TYPE_IS2, /* IS2-0 */
Expand All @@ -31,6 +32,7 @@ static struct lan966x_vcap_inst {
.first_cid = LAN966X_VCAP_CID_IS2_L0,
.last_cid = LAN966X_VCAP_CID_IS2_MAX,
.count = 256,
.ingress = true,
},
};

Expand Down Expand Up @@ -431,6 +433,7 @@ lan966x_vcap_admin_alloc(struct lan966x *lan966x, struct vcap_control *ctrl,

admin->vtype = cfg->vtype;
admin->vinst = 0;
admin->ingress = cfg->ingress;
admin->w32be = true;
admin->tgt_inst = cfg->tgt_inst;

Expand Down
1 change: 1 addition & 0 deletions drivers/net/ethernet/microchip/sparx5/sparx5_main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -198,6 +198,7 @@ static const struct sparx5_main_io_resource sparx5_main_iomap[] = {
{ TARGET_QSYS, 0x110a0000, 2 }, /* 0x6110a0000 */
{ TARGET_QFWD, 0x110b0000, 2 }, /* 0x6110b0000 */
{ TARGET_XQS, 0x110c0000, 2 }, /* 0x6110c0000 */
{ TARGET_VCAP_ES2, 0x110d0000, 2 }, /* 0x6110d0000 */
{ TARGET_CLKGEN, 0x11100000, 2 }, /* 0x611100000 */
{ TARGET_ANA_AC_POL, 0x11200000, 2 }, /* 0x611200000 */
{ TARGET_QRES, 0x11280000, 2 }, /* 0x611280000 */
Expand Down
227 changes: 225 additions & 2 deletions drivers/net/ethernet/microchip/sparx5/sparx5_main_regs.h
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Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,8 @@
* Copyright (c) 2021 Microchip Technology Inc.
*/

/* This file is autogenerated by cml-utils 2022-12-06 15:28:38 +0100.
* Commit ID: 3db2ac730f134c160496f2b9f10915e347d871cb
/* This file is autogenerated by cml-utils 2023-01-17 17:04:43 +0100.
* Commit ID: cc027a9bd71002aebf074df5ad8584fe1545e05e
*/

#ifndef _SPARX5_MAIN_REGS_H_
Expand Down Expand Up @@ -46,6 +46,7 @@ enum sparx5_target {
TARGET_QS = 177,
TARGET_QSYS = 178,
TARGET_REW = 179,
TARGET_VCAP_ES2 = 324,
TARGET_VCAP_SUPER = 326,
TARGET_VOP = 327,
TARGET_XQS = 331,
Expand Down Expand Up @@ -3120,6 +3121,36 @@ enum sparx5_target {
#define DSM_TAXI_CAL_CFG_CAL_PGM_ENA_GET(x)\
FIELD_GET(DSM_TAXI_CAL_CFG_CAL_PGM_ENA, x)

/* EACL:ES2_KEY_SELECT_PROFILE:VCAP_ES2_KEY_SEL */
#define EACL_VCAP_ES2_KEY_SEL(g, r) __REG(TARGET_EACL, 0, 1, 149504, g, 138, 8, 0, r, 2, 4)

#define EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL GENMASK(7, 5)
#define EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL_SET(x)\
FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL, x)
#define EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL_GET(x)\
FIELD_GET(EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL, x)

#define EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL GENMASK(4, 2)
#define EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL_SET(x)\
FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL, x)
#define EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL_GET(x)\
FIELD_GET(EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL, x)

#define EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL BIT(1)
#define EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL_SET(x)\
FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL, x)
#define EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL_GET(x)\
FIELD_GET(EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL, x)

#define EACL_VCAP_ES2_KEY_SEL_KEY_ENA BIT(0)
#define EACL_VCAP_ES2_KEY_SEL_KEY_ENA_SET(x)\
FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_KEY_ENA, x)
#define EACL_VCAP_ES2_KEY_SEL_KEY_ENA_GET(x)\
FIELD_GET(EACL_VCAP_ES2_KEY_SEL_KEY_ENA, x)

/* EACL:CNT_TBL:ES2_CNT */
#define EACL_ES2_CNT(g) __REG(TARGET_EACL, 0, 1, 122880, g, 2048, 4, 0, 0, 1, 4)

/* EACL:POL_CFG:POL_EACL_CFG */
#define EACL_POL_EACL_CFG __REG(TARGET_EACL, 0, 1, 150608, 0, 1, 780, 768, 0, 1, 4)

Expand Down Expand Up @@ -3159,6 +3190,57 @@ enum sparx5_target {
#define EACL_POL_EACL_CFG_EACL_FORCE_INIT_GET(x)\
FIELD_GET(EACL_POL_EACL_CFG_EACL_FORCE_INIT, x)

/* EACL:ES2_STICKY:SEC_LOOKUP_STICKY */
#define EACL_SEC_LOOKUP_STICKY(r) __REG(TARGET_EACL, 0, 1, 118696, 0, 1, 8, 0, r, 2, 4)

#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY BIT(7)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY_SET(x)\
FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY, x)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY_GET(x)\
FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY, x)

#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY BIT(6)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY_SET(x)\
FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY, x)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY_GET(x)\
FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY, x)

#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY BIT(5)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY_SET(x)\
FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY, x)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY_GET(x)\
FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY, x)

#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY BIT(4)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY_SET(x)\
FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY, x)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY_GET(x)\
FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY, x)

#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY BIT(3)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY_SET(x)\
FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY, x)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY_GET(x)\
FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY, x)

#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY BIT(2)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY_SET(x)\
FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY, x)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY_GET(x)\
FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY, x)

#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY BIT(1)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY_SET(x)\
FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY, x)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY_GET(x)\
FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY, x)

#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY BIT(0)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY_SET(x)\
FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x)
#define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY_GET(x)\
FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x)

/* EACL:RAM_CTRL:RAM_INIT */
#define EACL_RAM_INIT __REG(TARGET_EACL, 0, 1, 118736, 0, 1, 4, 0, 0, 1, 4)

Expand Down Expand Up @@ -5612,6 +5694,147 @@ enum sparx5_target {
#define REW_RAM_INIT_RAM_CFG_HOOK_GET(x)\
FIELD_GET(REW_RAM_INIT_RAM_CFG_HOOK, x)

/* VCAP_ES2:VCAP_CORE_CFG:VCAP_UPDATE_CTRL */
#define VCAP_ES2_CTRL __REG(TARGET_VCAP_ES2, 0, 1, 0, 0, 1, 8, 0, 0, 1, 4)

#define VCAP_ES2_CTRL_UPDATE_CMD GENMASK(24, 22)
#define VCAP_ES2_CTRL_UPDATE_CMD_SET(x)\
FIELD_PREP(VCAP_ES2_CTRL_UPDATE_CMD, x)
#define VCAP_ES2_CTRL_UPDATE_CMD_GET(x)\
FIELD_GET(VCAP_ES2_CTRL_UPDATE_CMD, x)

#define VCAP_ES2_CTRL_UPDATE_ENTRY_DIS BIT(21)
#define VCAP_ES2_CTRL_UPDATE_ENTRY_DIS_SET(x)\
FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ENTRY_DIS, x)
#define VCAP_ES2_CTRL_UPDATE_ENTRY_DIS_GET(x)\
FIELD_GET(VCAP_ES2_CTRL_UPDATE_ENTRY_DIS, x)

#define VCAP_ES2_CTRL_UPDATE_ACTION_DIS BIT(20)
#define VCAP_ES2_CTRL_UPDATE_ACTION_DIS_SET(x)\
FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ACTION_DIS, x)
#define VCAP_ES2_CTRL_UPDATE_ACTION_DIS_GET(x)\
FIELD_GET(VCAP_ES2_CTRL_UPDATE_ACTION_DIS, x)

#define VCAP_ES2_CTRL_UPDATE_CNT_DIS BIT(19)
#define VCAP_ES2_CTRL_UPDATE_CNT_DIS_SET(x)\
FIELD_PREP(VCAP_ES2_CTRL_UPDATE_CNT_DIS, x)
#define VCAP_ES2_CTRL_UPDATE_CNT_DIS_GET(x)\
FIELD_GET(VCAP_ES2_CTRL_UPDATE_CNT_DIS, x)

#define VCAP_ES2_CTRL_UPDATE_ADDR GENMASK(18, 3)
#define VCAP_ES2_CTRL_UPDATE_ADDR_SET(x)\
FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ADDR, x)
#define VCAP_ES2_CTRL_UPDATE_ADDR_GET(x)\
FIELD_GET(VCAP_ES2_CTRL_UPDATE_ADDR, x)

#define VCAP_ES2_CTRL_UPDATE_SHOT BIT(2)
#define VCAP_ES2_CTRL_UPDATE_SHOT_SET(x)\
FIELD_PREP(VCAP_ES2_CTRL_UPDATE_SHOT, x)
#define VCAP_ES2_CTRL_UPDATE_SHOT_GET(x)\
FIELD_GET(VCAP_ES2_CTRL_UPDATE_SHOT, x)

#define VCAP_ES2_CTRL_CLEAR_CACHE BIT(1)
#define VCAP_ES2_CTRL_CLEAR_CACHE_SET(x)\
FIELD_PREP(VCAP_ES2_CTRL_CLEAR_CACHE, x)
#define VCAP_ES2_CTRL_CLEAR_CACHE_GET(x)\
FIELD_GET(VCAP_ES2_CTRL_CLEAR_CACHE, x)

#define VCAP_ES2_CTRL_MV_TRAFFIC_IGN BIT(0)
#define VCAP_ES2_CTRL_MV_TRAFFIC_IGN_SET(x)\
FIELD_PREP(VCAP_ES2_CTRL_MV_TRAFFIC_IGN, x)
#define VCAP_ES2_CTRL_MV_TRAFFIC_IGN_GET(x)\
FIELD_GET(VCAP_ES2_CTRL_MV_TRAFFIC_IGN, x)

/* VCAP_ES2:VCAP_CORE_CFG:VCAP_MV_CFG */
#define VCAP_ES2_CFG __REG(TARGET_VCAP_ES2, 0, 1, 0, 0, 1, 8, 4, 0, 1, 4)

#define VCAP_ES2_CFG_MV_NUM_POS GENMASK(31, 16)
#define VCAP_ES2_CFG_MV_NUM_POS_SET(x)\
FIELD_PREP(VCAP_ES2_CFG_MV_NUM_POS, x)
#define VCAP_ES2_CFG_MV_NUM_POS_GET(x)\
FIELD_GET(VCAP_ES2_CFG_MV_NUM_POS, x)

#define VCAP_ES2_CFG_MV_SIZE GENMASK(15, 0)
#define VCAP_ES2_CFG_MV_SIZE_SET(x)\
FIELD_PREP(VCAP_ES2_CFG_MV_SIZE, x)
#define VCAP_ES2_CFG_MV_SIZE_GET(x)\
FIELD_GET(VCAP_ES2_CFG_MV_SIZE, x)

/* VCAP_ES2:VCAP_CORE_CACHE:VCAP_ENTRY_DAT */
#define VCAP_ES2_VCAP_ENTRY_DAT(r) __REG(TARGET_VCAP_ES2, 0, 1, 8, 0, 1, 904, 0, r, 64, 4)

/* VCAP_ES2:VCAP_CORE_CACHE:VCAP_MASK_DAT */
#define VCAP_ES2_VCAP_MASK_DAT(r) __REG(TARGET_VCAP_ES2, 0, 1, 8, 0, 1, 904, 256, r, 64, 4)

/* VCAP_ES2:VCAP_CORE_CACHE:VCAP_ACTION_DAT */
#define VCAP_ES2_VCAP_ACTION_DAT(r) __REG(TARGET_VCAP_ES2, 0, 1, 8, 0, 1, 904, 512, r, 64, 4)

/* VCAP_ES2:VCAP_CORE_CACHE:VCAP_CNT_DAT */
#define VCAP_ES2_VCAP_CNT_DAT(r) __REG(TARGET_VCAP_ES2, 0, 1, 8, 0, 1, 904, 768, r, 32, 4)

/* VCAP_ES2:VCAP_CORE_CACHE:VCAP_CNT_FW_DAT */
#define VCAP_ES2_VCAP_CNT_FW_DAT __REG(TARGET_VCAP_ES2, 0, 1, 8, 0, 1, 904, 896, 0, 1, 4)

/* VCAP_ES2:VCAP_CORE_CACHE:VCAP_TG_DAT */
#define VCAP_ES2_VCAP_TG_DAT __REG(TARGET_VCAP_ES2, 0, 1, 8, 0, 1, 904, 900, 0, 1, 4)

/* VCAP_ES2:VCAP_CORE_MAP:VCAP_CORE_IDX */
#define VCAP_ES2_IDX __REG(TARGET_VCAP_ES2, 0, 1, 912, 0, 1, 8, 0, 0, 1, 4)

#define VCAP_ES2_IDX_CORE_IDX GENMASK(3, 0)
#define VCAP_ES2_IDX_CORE_IDX_SET(x)\
FIELD_PREP(VCAP_ES2_IDX_CORE_IDX, x)
#define VCAP_ES2_IDX_CORE_IDX_GET(x)\
FIELD_GET(VCAP_ES2_IDX_CORE_IDX, x)

/* VCAP_ES2:VCAP_CORE_MAP:VCAP_CORE_MAP */
#define VCAP_ES2_MAP __REG(TARGET_VCAP_ES2, 0, 1, 912, 0, 1, 8, 4, 0, 1, 4)

#define VCAP_ES2_MAP_CORE_MAP GENMASK(2, 0)
#define VCAP_ES2_MAP_CORE_MAP_SET(x)\
FIELD_PREP(VCAP_ES2_MAP_CORE_MAP, x)
#define VCAP_ES2_MAP_CORE_MAP_GET(x)\
FIELD_GET(VCAP_ES2_MAP_CORE_MAP, x)

/* VCAP_ES2:VCAP_CORE_STICKY:VCAP_STICKY */
#define VCAP_ES2_VCAP_STICKY __REG(TARGET_VCAP_ES2, 0, 1, 920, 0, 1, 4, 0, 0, 1, 4)

#define VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY BIT(0)
#define VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY_SET(x)\
FIELD_PREP(VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY, x)
#define VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY_GET(x)\
FIELD_GET(VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY, x)

/* VCAP_ES2:VCAP_CONST:VCAP_VER */
#define VCAP_ES2_VCAP_VER __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 0, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:ENTRY_WIDTH */
#define VCAP_ES2_ENTRY_WIDTH __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 4, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:ENTRY_CNT */
#define VCAP_ES2_ENTRY_CNT __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 8, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:ENTRY_SWCNT */
#define VCAP_ES2_ENTRY_SWCNT __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 12, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:ENTRY_TG_WIDTH */
#define VCAP_ES2_ENTRY_TG_WIDTH __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 16, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:ACTION_DEF_CNT */
#define VCAP_ES2_ACTION_DEF_CNT __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 20, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:ACTION_WIDTH */
#define VCAP_ES2_ACTION_WIDTH __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 24, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:CNT_WIDTH */
#define VCAP_ES2_CNT_WIDTH __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 28, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:CORE_CNT */
#define VCAP_ES2_CORE_CNT __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 32, 0, 1, 4)

/* VCAP_ES2:VCAP_CONST:IF_CNT */
#define VCAP_ES2_IF_CNT __REG(TARGET_VCAP_ES2, 0, 1, 924, 0, 1, 40, 36, 0, 1, 4)

/* VCAP_SUPER:VCAP_CORE_CFG:VCAP_UPDATE_CTRL */
#define VCAP_SUPER_CTRL __REG(TARGET_VCAP_SUPER, 0, 1, 0, 0, 1, 8, 0, 0, 1, 4)

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