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dt-bindings: phy: add support for STM32 USB PHY Controller (USBPHYC)
This patch adds the device tree bindings description for STM32 USBPHYC (USB PHY Controller). Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Mar 16, 2018
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Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt
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STMicroelectronics STM32 USB HS PHY controller | ||
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The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI | ||
switch. It controls PHY configuration and status, and the UTMI+ switch that | ||
selects either OTG or HOST controller for the second PHY port. It also sets | ||
PLL configuration. | ||
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USBPHYC | ||
|_ PLL | ||
| | ||
|_ PHY port#1 _________________ HOST controller | ||
| _ | | ||
| / 1|________________| | ||
|_ PHY port#2 ----| |________________ | ||
| \_0| | | ||
|_ UTMI switch_______| OTG controller | ||
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Phy provider node | ||
================= | ||
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Required properties: | ||
- compatible: must be "st,stm32mp1-usbphyc" | ||
- reg: address and length of the usb phy control register set | ||
- clocks: phandle + clock specifier for the PLL phy clock | ||
- #address-cells: number of address cells for phys sub-nodes, must be <1> | ||
- #size-cells: number of size cells for phys sub-nodes, must be <0> | ||
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Optional properties: | ||
- assigned-clocks: phandle + clock specifier for the PLL phy clock | ||
- assigned-clock-parents: the PLL phy clock parent | ||
- resets: phandle + reset specifier | ||
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Required nodes: one sub-node per port the controller provides. | ||
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Phy sub-nodes | ||
============== | ||
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Required properties: | ||
- reg: phy port index | ||
- phy-supply: phandle to the regulator providing 3V3 power to the PHY, | ||
see phy-bindings.txt in the same directory. | ||
- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY | ||
- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY | ||
- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY | ||
port#1 and must be <1> for PHY port#2, to select USB controller | ||
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Example: | ||
usbphyc: usb-phy@5a006000 { | ||
compatible = "st,stm32mp1-usbphyc"; | ||
reg = <0x5a006000 0x1000>; | ||
clocks = <&rcc_clk USBPHY_K>; | ||
resets = <&rcc_rst USBPHY_R>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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usbphyc_port0: usb-phy@0 { | ||
reg = <0>; | ||
phy-supply = <&vdd_usb>; | ||
vdda1v1-supply = <®11>; | ||
vdda1v8-supply = <®18> | ||
#phy-cells = <0>; | ||
}; | ||
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usbphyc_port1: usb-phy@1 { | ||
reg = <1>; | ||
phy-supply = <&vdd_usb>; | ||
vdda1v1-supply = <®11>; | ||
vdda1v8-supply = <®18> | ||
#phy-cells = <1>; | ||
}; | ||
}; |