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Merge branch 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linu…
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…x/kernel/git/tip/tip

Pull x86 asm updates from Ingo Molnar:

 - better support (non-atomic) 64-bit readq()/writeq() variants (Andy
   Shevchenko)

 - __clear_user() micro-optimization (Alexey Dobriyan)

* 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/io: Define readq()/writeq() to use 64-bit type
  x86/asm/64: Micro-optimize __clear_user() - Use immediate constants
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Linus Torvalds committed Jun 5, 2018
2 parents 5cef8c2 + 6469a0e commit 1b246d2
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Showing 2 changed files with 8 additions and 9 deletions.
8 changes: 4 additions & 4 deletions arch/x86/include/asm/io.h
Original file line number Diff line number Diff line change
Expand Up @@ -94,10 +94,10 @@ build_mmio_write(__writel, "l", unsigned int, "r", )

#ifdef CONFIG_X86_64

build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
build_mmio_read(__readq, "q", unsigned long, "=r", )
build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
build_mmio_write(__writeq, "q", unsigned long, "r", )
build_mmio_read(readq, "q", u64, "=r", :"memory")
build_mmio_read(__readq, "q", u64, "=r", )
build_mmio_write(writeq, "q", u64, "r", :"memory")
build_mmio_write(__writeq, "q", u64, "r", )

#define readq_relaxed(a) __readq(a)
#define writeq_relaxed(v, a) __writeq(v, a)
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9 changes: 4 additions & 5 deletions arch/x86/lib/usercopy_64.c
Original file line number Diff line number Diff line change
Expand Up @@ -23,13 +23,13 @@ unsigned long __clear_user(void __user *addr, unsigned long size)
asm volatile(
" testq %[size8],%[size8]\n"
" jz 4f\n"
"0: movq %[zero],(%[dst])\n"
" addq %[eight],%[dst]\n"
"0: movq $0,(%[dst])\n"
" addq $8,%[dst]\n"
" decl %%ecx ; jnz 0b\n"
"4: movq %[size1],%%rcx\n"
" testl %%ecx,%%ecx\n"
" jz 2f\n"
"1: movb %b[zero],(%[dst])\n"
"1: movb $0,(%[dst])\n"
" incq %[dst]\n"
" decl %%ecx ; jnz 1b\n"
"2:\n"
Expand All @@ -40,8 +40,7 @@ unsigned long __clear_user(void __user *addr, unsigned long size)
_ASM_EXTABLE(0b,3b)
_ASM_EXTABLE(1b,2b)
: [size8] "=&c"(size), [dst] "=&D" (__d0)
: [size1] "r"(size & 7), "[size8]" (size / 8), "[dst]"(addr),
[zero] "r" (0UL), [eight] "r" (8UL));
: [size1] "r"(size & 7), "[size8]" (size / 8), "[dst]"(addr));
clac();
return size;
}
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