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Merge tag 'qcom-clk-for-6.6' of https://git.kernel.org/pub/scm/linux/…
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…kernel/git/qcom/linux into clk-qcom

Pull Qualcomm clk driver updates from Bjorn Andersson:

 - Support for the Global Clock Controller in IPQ5018 is added.
 - The SMD RPM driver is cleaned up, with interconnect bus clocks moved
   out to the interconnect drivers. Due to being tangled with the
   related interconnect updates, the topic branch with interconnect
   patches was merged in as well.
 - Various bugs in PM runtime integration is fixes across many platforms.
 - The MSM8996 core bus framework gains support for MSM8996 Pro.
 - MDM9615 is transitioned to parent_hw and parent_data, with related
   cleanups. With this the cxo proxy clock is dropped from the driver.
   And LCC support for MDM9615 is merged into the MSM8960 driver, to
   avoid duplication.
 - Network-related resets are added on IPQ4019
 - A couple of missing USB-related clocks are added for IPQ9574
 - The missing gpll0_sleep_clk_src is added to MSM8917 global clock
   controller
 - A few minor fixes for MSM8998 global clock controller.
 - In the QDU1000 global clock controller GDSCs, clkrefs, and GPLL1 are
   added, while PCIe pipe clock, SDCC rcg ops are corrected.
 - Missing GDSCs are added to SC8280XP global clock controller driver,
   flags for existing GDSCs are corrected, by enabling retention and
   dropping the always-on flags. Retention is also enabled for the
   display clock controller GDSCs.
 - SDCC apps_clk_src is marked CLK_OPS_PARENT_ENABLE to fix issues with
   missing parent clocks across sc7180, sm7150, sm6350 and sm8250, while
   sm8450 is corrected to use floor ops.
 - SM6350 GPU clock controller clock supplies are corrected.
 - Unwanted clocks from the IPQ5332 GCC are dropped.
 - The missing OXILICX GDSC is added to MSM8226 GCC.
 - The delay in the reset controller is transitioned to fsleep() to
   invoke the appropriate sleep method depending on duration.
 - The SM83550 Video clock controller is extended to support SC8280XP.

* tag 'qcom-clk-for-6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (86 commits)
  clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
  clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
  clk: qcom: gcc-ipq5018: change some variable static
  clk: qcom: gcc-ipq4019: add missing networking resets
  dt-bindings: clock: qcom: ipq4019: add missing networking resets
  clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
  dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
  clk: qcom: gcc-qdu1000: Update the RCGs ops
  clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
  clk: qcom: gcc-qdu1000: Add support for GDSCs
  clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
  clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
  clk: qcom: gcc-qdu1000: Fix clkref clocks handling
  clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
  dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
  clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
  clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
  clk: qcom: ipq5332: drop the mem noc clocks
  clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
  clk: qcom: gpucc-msm8998: Use the correct GPLL0 leg with old DTs
  ...
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Stephen Boyd committed Aug 22, 2023
2 parents 06c2afb + e1cd74b commit 1b3e04a
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Showing 92 changed files with 5,381 additions and 1,436 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on APQ8064/MSM8960

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on IPQ4019

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>
- Robert Marko <robert.markoo@sartura.hr>

description: |
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Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on IPQ8074

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on MSM8976

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on MSM8996

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module which provides the clocks, resets and
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on MSM8998

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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5 changes: 1 addition & 4 deletions Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
Expand All @@ -19,8 +19,6 @@ description: |
include/dt-bindings/reset/qcom,gcc-ipq6018.h
include/dt-bindings/clock/qcom,gcc-msm8953.h
include/dt-bindings/clock/qcom,gcc-mdm9607.h
include/dt-bindings/clock/qcom,gcc-mdm9615.h
include/dt-bindings/reset/qcom,gcc-mdm9615.h
allOf:
- $ref: qcom,gcc.yaml#
Expand All @@ -30,7 +28,6 @@ properties:
enum:
- qcom,gcc-ipq6018
- qcom,gcc-mdm9607
- qcom,gcc-mdm9615

required:
- compatible
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Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on QCS404

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on SC7180

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Global Clock & Reset Controller on SC7280

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on SDM670 and SDM845

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on SM8150

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller on SM8250

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/clock/qcom,gcc.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Global Clock & Reset Controller Common Properties

maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Common bindings for Qualcomm global clock control module providing the
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2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Graphics Clock & Reset Controller

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm graphics clock control module provides the clocks, resets and power
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63 changes: 63 additions & 0 deletions Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,63 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,ipq5018-gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Global Clock & Reset Controller on IPQ5018

maintainers:
- Sricharan Ramabadhran <quic_srichara@quicinc.com>

description: |
Qualcomm global clock control module provides the clocks, resets and power
domains on IPQ5018
See also::
include/dt-bindings/clock/qcom,ipq5018-gcc.h
include/dt-bindings/reset/qcom,ipq5018-gcc.h
properties:
compatible:
const: qcom,gcc-ipq5018

clocks:
items:
- description: Board XO source
- description: Sleep clock source
- description: PCIE20 PHY0 pipe clock source
- description: PCIE20 PHY1 pipe clock source
- description: USB3 PHY pipe clock source
- description: GEPHY RX clock source
- description: GEPHY TX clock source
- description: UNIPHY RX clock source
- description: UNIPHY TX clk source

required:
- compatible
- clocks

allOf:
- $ref: qcom,gcc.yaml#

unevaluatedProperties: false

examples:
- |
clock-controller@1800000 {
compatible = "qcom,gcc-ipq5018";
reg = <0x01800000 0x80000>;
clocks = <&xo_board_clk>,
<&sleep_clk>,
<&pcie20_phy0_pipe_clk>,
<&pcie20_phy1_pipe_clk>,
<&usb3_phy0_pipe_clk>,
<&gephy_rx_clk>,
<&gephy_tx_clk>,
<&uniphy_rx_clk>,
<&uniphy_tx_clk>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
...
34 changes: 34 additions & 0 deletions Documentation/devicetree/bindings/clock/qcom,lcc.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,40 @@ allOf:
- clocks
- clock-names

- if:
properties:
compatible:
contains:
enum:
- qcom,lcc-mdm9615
then:
properties:
clocks:
items:
- description: Board CXO source
- description: PLL 4 Vote clock
- description: MI2S codec clock
- description: Mic I2S codec clock
- description: Mic I2S spare clock
- description: Speaker I2S codec clock
- description: Speaker I2S spare clock
- description: PCM codec clock

clock-names:
items:
- const: cxo
- const: pll4_vote
- const: mi2s_codec_clk
- const: codec_i2s_mic_codec_clk
- const: spare_i2s_mic_codec_clk
- const: codec_i2s_spkr_codec_clk
- const: spare_i2s_spkr_codec_clk
- const: pcm_codec_clk

required:
- clocks
- clock-names

examples:
- |
clock-controller@28000000 {
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4 changes: 3 additions & 1 deletion Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ title: Qualcomm Multimedia Clock & Reset Controller

maintainers:
- Jeffrey Hugo <quic_jhugo@quicinc.com>
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm multimedia clock control module provides the clocks, resets and
Expand Down Expand Up @@ -297,6 +297,7 @@ allOf:
- description: HDMI phy PLL clock
- description: DisplayPort phy PLL link clock
- description: DisplayPort phy PLL vco clock
- description: Global PLL 0 DIV clock

clock-names:
items:
Expand All @@ -309,6 +310,7 @@ allOf:
- const: hdmipll
- const: dplink
- const: dpvco
- const: gpll0_div

- if:
properties:
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Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,9 @@ description: >
properties:
compatible:
const: qcom,msm8996-cbf
enum:
- qcom,msm8996-cbf
- qcom,msm8996pro-cbf

reg:
maxItems: 1
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Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Graphics Clock & Reset Controller on MSM8998

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm graphics clock control module provides the clocks, resets and power
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000

maintainers:
- Melody Olvera <quic_molvera@quicinc.com>
- Taniya Das <quic_tdas@quicinc.com>
- Imran Shaik <quic_imrashai@quicinc.com>

description: |
Qualcomm global clock control module which supports the clocks, resets and
Expand Down
2 changes: 1 addition & 1 deletion Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. RPMh Clocks

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Resource Power Manager Hardened (RPMh) manages shared resources on
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Camera Clock & Reset Controller on SC7180

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm camera clock control module provides the clocks, resets and power
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display Clock & Reset Controller on SC7180

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm display clock control module provides the clocks, resets and power
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Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm LPASS Core Clock Controller on SC7180

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm LPASS core clock control module provides the clocks and power
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Modem Clock Controller on SC7180

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm modem clock control module provides the clocks on SC7180.
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Camera Clock & Reset Controller on SC7280

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm camera clock control module provides the clocks, resets and
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display Clock & Reset Controller on SC7280

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm display clock control module provides the clocks, resets and power
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm LPASS Core Clock Controller on SC7280

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm LPASS core clock control module provides the clocks and power
Expand Down
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Expand Up @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm LPASS Core & Audio Clock Controller on SC7280

maintainers:
- Taniya Das <tdas@codeaurora.org>
- Taniya Das <quic_tdas@quicinc.com>

description: |
Qualcomm LPASS core and audio clock control module provides the clocks and
Expand Down
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