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powerpc: Fix handling of alignment interrupt on dcbz instruction
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This fixes the emulation of the dcbz instruction in the alignment
interrupt handler.  The error was that we were comparing just the
instruction type field of op.type rather than the whole thing,
and therefore the comparison "type != CACHEOP + DCBZ" was always
true.

Fixes: 31bfdb0 ("powerpc: Use instruction emulation infrastructure to handle alignment faults")
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Tested-by: Michal Sojka <sojkam1@fel.cvut.cz>
Tested-by: Christian Zigotzky <chzigotzky@xenosoft.de>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Paul Mackerras authored and Michael Ellerman committed Sep 14, 2017
1 parent bac65d9 commit 1bc944c
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion arch/powerpc/kernel/align.c
Original file line number Diff line number Diff line change
Expand Up @@ -341,7 +341,7 @@ int fix_alignment(struct pt_regs *regs)

type = op.type & INSTR_TYPE_MASK;
if (!OP_IS_LOAD_STORE(type)) {
if (type != CACHEOP + DCBZ)
if (op.type != CACHEOP + DCBZ)
return -EINVAL;
PPC_WARN_ALIGNMENT(dcbz, regs);
r = emulate_dcbz(op.ea, regs);
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