dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning p…

…arameters

Add support for overriding QUSB2 V2 phy tuning parameters
in device tree bindings.

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml

@@ -75,7 +75,7 @@ if:
   properties:
     compatible:
       contains:
-        const: qcom,sdm845-qusb2-phy
+        const: qcom,qusb2-v2-phy
 then:
   properties:
     qcom,imp-res-offset-value:
@@ -89,6 +89,26 @@ then:
           maximum: 63
           default: 0
 
+    qcom,bias-ctrl-value:
+      description:
+        It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
+        tuning parameter that may vary for different boards of same SOC.
+      allOf:
+        - $ref: /schemas/types.yaml#/definitions/uint32
+        - minimum: 0
+          maximum: 63
+          default: 0
+
+    qcom,charge-ctrl-value:
+     description:
+        It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
+        tuning parameter that may vary for different boards of same SOC.
+     allOf:
+       - $ref: /schemas/types.yaml#/definitions/uint32
+       - minimum: 0
+         maximum: 3
+         default: 0
+
     qcom,hstx-trim-value:
       description:
         It is a 4 bit value that specifies tuning for HSTX
@@ -124,6 +144,16 @@ then:
           maximum: 1
           default: 0
 
+    qcom,hsdisc-trim-value:
+      description:
+        It is a 2 bit value tuning parameter that control disconnect
+        threshold and may vary for different boards of same SOC.
+      allOf:
+        - $ref: /schemas/types.yaml#/definitions/uint32
+        - minimum: 0
+          maximum: 3
+          default: 0
+
 required:
   - compatible
   - reg