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dt-bindings: dma: Convert fsl,elo*-dma to YAML
The devicetree bindings for Freescale DMA engines have so far existed as a text file. This patch converts them to YAML, and specifies all the compatible strings currently in use in arch/powerpc/boot/dts. Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250308-ppcyaml-dma-v4-1-20392ea81ec6@posteo.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Freescale Elo DMA Controller | ||
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maintainers: | ||
- J. Neuschäfer <j.ne@posteo.net> | ||
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description: | ||
This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx | ||
series chips such as mpc8315, mpc8349, mpc8379 etc. | ||
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properties: | ||
compatible: | ||
items: | ||
- enum: | ||
- fsl,mpc8313-dma | ||
- fsl,mpc8315-dma | ||
- fsl,mpc8323-dma | ||
- fsl,mpc8347-dma | ||
- fsl,mpc8349-dma | ||
- fsl,mpc8360-dma | ||
- fsl,mpc8377-dma | ||
- fsl,mpc8378-dma | ||
- fsl,mpc8379-dma | ||
- const: fsl,elo-dma | ||
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reg: | ||
items: | ||
- description: | ||
DMA General Status Register, i.e. DGSR which contains status for | ||
all the 4 DMA channels. | ||
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cell-index: | ||
$ref: /schemas/types.yaml#/definitions/uint32 | ||
description: Controller index. 0 for controller @ 0x8100. | ||
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ranges: true | ||
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"#address-cells": | ||
const: 1 | ||
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"#size-cells": | ||
const: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
description: Controller interrupt. | ||
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required: | ||
- compatible | ||
- reg | ||
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patternProperties: | ||
"^dma-channel@[0-9a-f]+$": | ||
type: object | ||
additionalProperties: false | ||
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properties: | ||
compatible: | ||
oneOf: | ||
# native DMA channel | ||
- items: | ||
- enum: | ||
- fsl,mpc8315-dma-channel | ||
- fsl,mpc8323-dma-channel | ||
- fsl,mpc8347-dma-channel | ||
- fsl,mpc8349-dma-channel | ||
- fsl,mpc8360-dma-channel | ||
- fsl,mpc8377-dma-channel | ||
- fsl,mpc8378-dma-channel | ||
- fsl,mpc8379-dma-channel | ||
- const: fsl,elo-dma-channel | ||
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# audio DMA channel, see fsl,ssi.yaml | ||
- const: fsl,ssi-dma-channel | ||
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reg: | ||
maxItems: 1 | ||
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cell-index: | ||
description: DMA channel index starts at 0. | ||
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interrupts: | ||
maxItems: 1 | ||
description: | ||
Per-channel interrupt. Only necessary if no controller interrupt has | ||
been provided. | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/interrupt-controller/irq.h> | ||
dma@82a8 { | ||
compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; | ||
reg = <0x82a8 4>; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges = <0 0x8100 0x1a4>; | ||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>; | ||
cell-index = <0>; | ||
dma-channel@0 { | ||
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
reg = <0 0x80>; | ||
cell-index = <0>; | ||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>; | ||
}; | ||
dma-channel@80 { | ||
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
reg = <0x80 0x80>; | ||
cell-index = <1>; | ||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>; | ||
}; | ||
dma-channel@100 { | ||
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
reg = <0x100 0x80>; | ||
cell-index = <2>; | ||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>; | ||
}; | ||
dma-channel@180 { | ||
compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
reg = <0x180 0x80>; | ||
cell-index = <3>; | ||
interrupts = <71 IRQ_TYPE_LEVEL_LOW>; | ||
}; | ||
}; | ||
... |
125 changes: 125 additions & 0 deletions
125
Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Freescale Elo3 DMA Controller | ||
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maintainers: | ||
- J. Neuschäfer <j.ne@posteo.net> | ||
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description: | ||
DMA controller which has same function as EloPlus except that Elo3 has 8 | ||
channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx | ||
series chips, such as t1040, t4240, b4860. | ||
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properties: | ||
compatible: | ||
const: fsl,elo3-dma | ||
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reg: | ||
items: | ||
- description: | ||
DMA General Status Registers starting from DGSR0, for channel 1~4 | ||
- description: | ||
DMA General Status Registers starting from DGSR1, for channel 5~8 | ||
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ranges: true | ||
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"#address-cells": | ||
const: 1 | ||
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"#size-cells": | ||
const: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
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patternProperties: | ||
"^dma-channel@[0-9a-f]+$": | ||
type: object | ||
additionalProperties: false | ||
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properties: | ||
compatible: | ||
enum: | ||
# native DMA channel | ||
- fsl,eloplus-dma-channel | ||
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# audio DMA channel, see fsl,ssi.yaml | ||
- fsl,ssi-dma-channel | ||
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reg: | ||
maxItems: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
description: | ||
Per-channel interrupt. Only necessary if no controller interrupt has | ||
been provided. | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/interrupt-controller/irq.h> | ||
dma@100300 { | ||
compatible = "fsl,elo3-dma"; | ||
reg = <0x100300 0x4>, | ||
<0x100600 0x4>; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges = <0x0 0x100100 0x500>; | ||
dma-channel@0 { | ||
compatible = "fsl,eloplus-dma-channel"; | ||
reg = <0x0 0x80>; | ||
interrupts = <28 IRQ_TYPE_EDGE_FALLING 0 0>; | ||
}; | ||
dma-channel@80 { | ||
compatible = "fsl,eloplus-dma-channel"; | ||
reg = <0x80 0x80>; | ||
interrupts = <29 IRQ_TYPE_EDGE_FALLING 0 0>; | ||
}; | ||
dma-channel@100 { | ||
compatible = "fsl,eloplus-dma-channel"; | ||
reg = <0x100 0x80>; | ||
interrupts = <30 IRQ_TYPE_EDGE_FALLING 0 0>; | ||
}; | ||
dma-channel@180 { | ||
compatible = "fsl,eloplus-dma-channel"; | ||
reg = <0x180 0x80>; | ||
interrupts = <31 IRQ_TYPE_EDGE_FALLING 0 0>; | ||
}; | ||
dma-channel@300 { | ||
compatible = "fsl,eloplus-dma-channel"; | ||
reg = <0x300 0x80>; | ||
interrupts = <76 IRQ_TYPE_EDGE_FALLING 0 0>; | ||
}; | ||
dma-channel@380 { | ||
compatible = "fsl,eloplus-dma-channel"; | ||
reg = <0x380 0x80>; | ||
interrupts = <77 IRQ_TYPE_EDGE_FALLING 0 0>; | ||
}; | ||
dma-channel@400 { | ||
compatible = "fsl,eloplus-dma-channel"; | ||
reg = <0x400 0x80>; | ||
interrupts = <78 IRQ_TYPE_EDGE_FALLING 0 0>; | ||
}; | ||
dma-channel@480 { | ||
compatible = "fsl,eloplus-dma-channel"; | ||
reg = <0x480 0x80>; | ||
interrupts = <79 IRQ_TYPE_EDGE_FALLING 0 0>; | ||
}; | ||
}; | ||
... |
132 changes: 132 additions & 0 deletions
132
Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/dma/fsl,eloplus-dma.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Freescale EloPlus DMA Controller | ||
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maintainers: | ||
- J. Neuschäfer <j.ne@posteo.net> | ||
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description: | ||
This is a 4-channel DMA controller with extended addresses and chaining, | ||
mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as | ||
mpc8540, mpc8641 p4080, bsc9131 etc. | ||
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properties: | ||
compatible: | ||
oneOf: | ||
- items: | ||
- enum: | ||
- fsl,mpc8540-dma | ||
- fsl,mpc8541-dma | ||
- fsl,mpc8548-dma | ||
- fsl,mpc8555-dma | ||
- fsl,mpc8560-dma | ||
- fsl,mpc8572-dma | ||
- fsl,mpc8641-dma | ||
- const: fsl,eloplus-dma | ||
- const: fsl,eloplus-dma | ||
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reg: | ||
items: | ||
- description: | ||
DMA General Status Register, i.e. DGSR which contains | ||
status for all the 4 DMA channels | ||
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cell-index: | ||
$ref: /schemas/types.yaml#/definitions/uint32 | ||
description: | ||
controller index. 0 for controller @ 0x21000, 1 for controller @ 0xc000 | ||
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ranges: true | ||
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"#address-cells": | ||
const: 1 | ||
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"#size-cells": | ||
const: 1 | ||
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interrupts: | ||
maxItems: 1 | ||
description: Controller interrupt. | ||
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patternProperties: | ||
"^dma-channel@[0-9a-f]+$": | ||
type: object | ||
additionalProperties: false | ||
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properties: | ||
compatible: | ||
oneOf: | ||
# native DMA channel | ||
- items: | ||
- enum: | ||
- fsl,mpc8540-dma-channel | ||
- fsl,mpc8541-dma-channel | ||
- fsl,mpc8548-dma-channel | ||
- fsl,mpc8555-dma-channel | ||
- fsl,mpc8560-dma-channel | ||
- fsl,mpc8572-dma-channel | ||
- const: fsl,eloplus-dma-channel | ||
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# audio DMA channel, see fsl,ssi.yaml | ||
- const: fsl,ssi-dma-channel | ||
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reg: | ||
maxItems: 1 | ||
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cell-index: | ||
description: DMA channel index starts at 0. | ||
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interrupts: | ||
maxItems: 1 | ||
description: | ||
Per-channel interrupt. Only necessary if no controller interrupt has | ||
been provided. | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
#include <dt-bindings/interrupt-controller/irq.h> | ||
dma@21300 { | ||
compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; | ||
reg = <0x21300 4>; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges = <0 0x21100 0x200>; | ||
cell-index = <0>; | ||
dma-channel@0 { | ||
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; | ||
reg = <0 0x80>; | ||
cell-index = <0>; | ||
interrupts = <20 IRQ_TYPE_EDGE_FALLING>; | ||
}; | ||
dma-channel@80 { | ||
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; | ||
reg = <0x80 0x80>; | ||
cell-index = <1>; | ||
interrupts = <21 IRQ_TYPE_EDGE_FALLING>; | ||
}; | ||
dma-channel@100 { | ||
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; | ||
reg = <0x100 0x80>; | ||
cell-index = <2>; | ||
interrupts = <22 IRQ_TYPE_EDGE_FALLING>; | ||
}; | ||
dma-channel@180 { | ||
compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; | ||
reg = <0x180 0x80>; | ||
cell-index = <3>; | ||
interrupts = <23 IRQ_TYPE_EDGE_FALLING>; | ||
}; | ||
}; | ||
... |
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