Skip to content

Commit

Permalink
drm/i915: unify gen6/gen8 rps irq enable/disable
Browse files Browse the repository at this point in the history 
The GEN6 and GEN8 versions differ only in the PM IIR and IER register
addresses and that on GEN8 we need to keep the
GEN8_PMINTR_REDIRECT_TO_NON_DISP PM interrupt unmasked. Abstract away
these 3 things in the GEN6 versions of the helpers and use them
everywhere.

No functional change.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
  • Loading branch information
Imre Deak authored and Daniel Vetter committed Nov 14, 2014
1 parent c9a9a26 commit 20415c5
Showing 1 changed file with 15 additions and 38 deletions.
53 changes: 15 additions & 38 deletions drivers/gpu/drm/i915/intel_pm.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4519,24 +4519,14 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
trace_intel_gpu_freq_change(vlv_gpu_freq(dev_priv, val));
}

static void gen8_disable_rps_interrupts(struct drm_device *dev)
static u32 gen6_pm_iir(struct drm_i915_private *dev_priv)
{
struct drm_i915_private *dev_priv = dev->dev_private;

I915_WRITE(GEN6_PMINTRMSK, ~GEN8_PMINTR_REDIRECT_TO_NON_DISP);
I915_WRITE(GEN8_GT_IER(2), I915_READ(GEN8_GT_IER(2)) &
~dev_priv->pm_rps_events);
/* Complete PM interrupt masking here doesn't race with the rps work
* item again unmasking PM interrupts because that is using a different
* register (GEN8_GT_IMR(2)) to mask PM interrupts. The only risk is in
* leaving stale bits in GEN8_GT_IIR(2) and GEN8_GT_IMR(2) which
* gen8_enable_rps will clean up. */

spin_lock_irq(&dev_priv->irq_lock);
dev_priv->rps.pm_iir = 0;
spin_unlock_irq(&dev_priv->irq_lock);
return INTEL_INFO(dev_priv)->gen >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;
}

I915_WRITE(GEN8_GT_IIR(2), dev_priv->pm_rps_events);
static u32 gen6_pm_ier(struct drm_i915_private *dev_priv)
{
return INTEL_INFO(dev_priv)->gen >= 8 ? GEN8_GT_IER(2) : GEN6_PMIER;
}

static void gen9_disable_rps(struct drm_device *dev)
Expand All @@ -4550,8 +4540,9 @@ static void gen6_disable_rps_interrupts(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;

I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
I915_WRITE(GEN6_PMIER, I915_READ(GEN6_PMIER) &
I915_WRITE(GEN6_PMINTRMSK, INTEL_INFO(dev_priv)->gen >= 8 ?
~GEN8_PMINTR_REDIRECT_TO_NON_DISP : ~0);
I915_WRITE(gen6_pm_ier(dev_priv), I915_READ(gen6_pm_ier(dev_priv)) &
~dev_priv->pm_rps_events);
/* Complete PM interrupt masking here doesn't race with the rps work
* item again unmasking PM interrupts because that is using a different
Expand All @@ -4562,7 +4553,7 @@ static void gen6_disable_rps_interrupts(struct drm_device *dev)
dev_priv->rps.pm_iir = 0;
spin_unlock_irq(&dev_priv->irq_lock);

I915_WRITE(GEN6_PMIIR, dev_priv->pm_rps_events);
I915_WRITE(gen6_pm_iir(dev_priv), dev_priv->pm_rps_events);
}

static void gen6_disable_rps(struct drm_device *dev)
Expand All @@ -4572,10 +4563,7 @@ static void gen6_disable_rps(struct drm_device *dev)
I915_WRITE(GEN6_RC_CONTROL, 0);
I915_WRITE(GEN6_RPNSWREQ, 1 << 31);

if (IS_BROADWELL(dev))
gen8_disable_rps_interrupts(dev);
else
gen6_disable_rps_interrupts(dev);
gen6_disable_rps_interrupts(dev);
}

static void cherryview_disable_rps(struct drm_device *dev)
Expand All @@ -4584,7 +4572,7 @@ static void cherryview_disable_rps(struct drm_device *dev)

I915_WRITE(GEN6_RC_CONTROL, 0);

gen8_disable_rps_interrupts(dev);
gen6_disable_rps_interrupts(dev);
}

static void valleyview_disable_rps(struct drm_device *dev)
Expand Down Expand Up @@ -4663,25 +4651,14 @@ int intel_enable_rc6(const struct drm_device *dev)
return i915.enable_rc6;
}

static void gen8_enable_rps_interrupts(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;

spin_lock_irq(&dev_priv->irq_lock);
WARN_ON(dev_priv->rps.pm_iir);
gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);
I915_WRITE(GEN8_GT_IIR(2), dev_priv->pm_rps_events);
spin_unlock_irq(&dev_priv->irq_lock);
}

static void gen6_enable_rps_interrupts(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;

spin_lock_irq(&dev_priv->irq_lock);
WARN_ON(dev_priv->rps.pm_iir);
gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);
I915_WRITE(GEN6_PMIIR, dev_priv->pm_rps_events);
I915_WRITE(gen6_pm_iir(dev_priv), dev_priv->pm_rps_events);
spin_unlock_irq(&dev_priv->irq_lock);
}

Expand Down Expand Up @@ -4823,7 +4800,7 @@ static void gen8_enable_rps(struct drm_device *dev)

gen6_set_rps(dev, (I915_READ(GEN6_GT_PERF_STATUS) & 0xff00) >> 8);

gen8_enable_rps_interrupts(dev);
gen6_enable_rps_interrupts(dev);

gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
}
Expand Down Expand Up @@ -5414,7 +5391,7 @@ static void cherryview_enable_rps(struct drm_device *dev)

valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq);

gen8_enable_rps_interrupts(dev);
gen6_enable_rps_interrupts(dev);

gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
}
Expand Down

0 comments on commit 20415c5

Please sign in to comment.