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Merge branch 'drm-fixes-4.16' of git://people.freedesktop.org/~agd5f/…
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…linux into drm-fixes

- Powerplay fixes for cards with no displays attached
- Couple of DC fixes
- radeon workaround for PPC64

* 'drm-fixes-4.16' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: insist on 32-bit DMA for Cedar on PPC64/PPC64LE
  drm/amd/display: VGA black screen from s3 when attached to hook
  drm/amdgpu: Unify the dm resume calls into one
  drm/amdgpu: Add a missing lock for drm_mm_takedown
  Revert "drm/radeon/pm: autoswitch power state when in balanced mode"
  drm/amd/powerplay/smu7: allow mclk switching with no displays
  drm/amd/powerplay/vega10: allow mclk switching with no displays
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Dave Airlie committed Feb 28, 2018
2 parents 4a3928c + 2c83029 commit 219b3b2
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Showing 8 changed files with 24 additions and 25 deletions.
9 changes: 0 additions & 9 deletions drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
Original file line number Diff line number Diff line change
Expand Up @@ -2284,14 +2284,6 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon)
drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
}
drm_modeset_unlock_all(dev);
} else {
/*
* There is no equivalent atomic helper to turn on
* display, so we defined our own function for this,
* once suspend resume is supported by the atomic
* framework this will be reworked
*/
amdgpu_dm_display_resume(adev);
}
}

Expand Down Expand Up @@ -2726,7 +2718,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
if (amdgpu_device_has_dc_support(adev)) {
if (drm_atomic_helper_resume(adev->ddev, state))
dev_info(adev->dev, "drm resume failed:%d\n", r);
amdgpu_dm_display_resume(adev);
} else {
drm_helper_resume_force_mode(adev->ddev);
}
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2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
Original file line number Diff line number Diff line change
Expand Up @@ -75,7 +75,7 @@ static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man)
{
struct amdgpu_gtt_mgr *mgr = man->priv;

spin_lock(&mgr->lock);
drm_mm_takedown(&mgr->mm);
spin_unlock(&mgr->lock);
kfree(mgr);
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4 changes: 3 additions & 1 deletion drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
Original file line number Diff line number Diff line change
Expand Up @@ -629,11 +629,13 @@ static int dm_resume(void *handle)
{
struct amdgpu_device *adev = handle;
struct amdgpu_display_manager *dm = &adev->dm;
int ret = 0;

/* power on hardware */
dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D0);

return 0;
ret = amdgpu_dm_display_resume(adev);
return ret;
}

int amdgpu_dm_display_resume(struct amdgpu_device *adev)
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2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
Original file line number Diff line number Diff line change
Expand Up @@ -1465,7 +1465,7 @@ void decide_link_settings(struct dc_stream_state *stream,
/* MST doesn't perform link training for now
* TODO: add MST specific link training routine
*/
if (is_mst_supported(link)) {
if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
*link_setting = link->verified_link_cap;
return;
}
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11 changes: 7 additions & 4 deletions drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
Original file line number Diff line number Diff line change
Expand Up @@ -2756,10 +2756,13 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
PHM_PlatformCaps_DisableMclkSwitchingForFrameLock);


disable_mclk_switching = ((1 < info.display_count) ||
disable_mclk_switching_for_frame_lock ||
smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us) ||
(mode_info.refresh_rate > 120));
if (info.display_count == 0)
disable_mclk_switching = false;
else
disable_mclk_switching = ((1 < info.display_count) ||
disable_mclk_switching_for_frame_lock ||
smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us) ||
(mode_info.refresh_rate > 120));

sclk = smu7_ps->performance_levels[0].engine_clock;
mclk = smu7_ps->performance_levels[0].memory_clock;
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11 changes: 7 additions & 4 deletions drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
Original file line number Diff line number Diff line change
Expand Up @@ -3168,10 +3168,13 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
disable_mclk_switching_for_vr = PP_CAP(PHM_PlatformCaps_DisableMclkSwitchForVR);
force_mclk_high = PP_CAP(PHM_PlatformCaps_ForceMclkHigh);

disable_mclk_switching = (info.display_count > 1) ||
disable_mclk_switching_for_frame_lock ||
disable_mclk_switching_for_vr ||
force_mclk_high;
if (info.display_count == 0)
disable_mclk_switching = false;
else
disable_mclk_switching = (info.display_count > 1) ||
disable_mclk_switching_for_frame_lock ||
disable_mclk_switching_for_vr ||
force_mclk_high;

sclk = vega10_ps->performance_levels[0].gfx_clock;
mclk = vega10_ps->performance_levels[0].mem_clock;
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4 changes: 4 additions & 0 deletions drivers/gpu/drm/radeon/radeon_device.c
Original file line number Diff line number Diff line change
Expand Up @@ -1365,6 +1365,10 @@ int radeon_device_init(struct radeon_device *rdev,
if ((rdev->flags & RADEON_IS_PCI) &&
(rdev->family <= CHIP_RS740))
rdev->need_dma32 = true;
#ifdef CONFIG_PPC64
if (rdev->family == CHIP_CEDAR)
rdev->need_dma32 = true;
#endif

dma_bits = rdev->need_dma32 ? 32 : 40;
r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits));
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6 changes: 1 addition & 5 deletions drivers/gpu/drm/radeon/radeon_pm.c
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,6 @@ static bool radeon_pm_in_vbl(struct radeon_device *rdev);
static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish);
static void radeon_pm_update_profile(struct radeon_device *rdev);
static void radeon_pm_set_clocks(struct radeon_device *rdev);
static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev);

int radeon_pm_get_type_index(struct radeon_device *rdev,
enum radeon_pm_state_type ps_type,
Expand Down Expand Up @@ -80,8 +79,6 @@ void radeon_pm_acpi_event_handler(struct radeon_device *rdev)
radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power);
}
mutex_unlock(&rdev->pm.mutex);
/* allow new DPM state to be picked */
radeon_pm_compute_clocks_dpm(rdev);
} else if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
if (rdev->pm.profile == PM_PROFILE_AUTO) {
mutex_lock(&rdev->pm.mutex);
Expand Down Expand Up @@ -885,8 +882,7 @@ static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev,
dpm_state = POWER_STATE_TYPE_INTERNAL_3DPERF;
/* balanced states don't exist at the moment */
if (dpm_state == POWER_STATE_TYPE_BALANCED)
dpm_state = rdev->pm.dpm.ac_power ?
POWER_STATE_TYPE_PERFORMANCE : POWER_STATE_TYPE_BATTERY;
dpm_state = POWER_STATE_TYPE_PERFORMANCE;

restart_search:
/* Pick the best power state based on current conditions */
Expand Down

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